MT90222 ZARLINK [Zarlink Semiconductor Inc], MT90222 Datasheet - Page 21
![no-image](/images/no-image-200.jpg)
MT90222
Manufacturer Part Number
MT90222
Description
4/8/16 Port IMA/TC PHY Device
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.MT90222.pdf
(155 pages)
- Current page: 21 of 155
- Download datasheet (920Kb)
MT90223 Pin Description (continued)
B12,A12,C13,B1
A10,C11,D11,B1
6,AD6,AF5,AE5,
AE8,AD8,AF7,A
E7,AD7,AC7,AF
AD5,AE4,AF3,A
1,A11,C12,D12,
3,A14,B14,C14,
B7,A7,D8,C8,
B8,D9,C9,B9
A9,C10,B10,
D4,AE3,AF2
AE12,AC12,
AC11,AD11,
AF10,AE10,
AF11,AE11,
AD10,AF9,
AE9,AD9
A15,B15
A16,B16
Pin #
AF12
AD13
AE13
D15
AC9
L1,
L2,
L4,
L3,
K1
sr_cs_1, 0
URxAddr
Name
up_r/w
up_oe
up_irq
sr_we
up_wr
up_cs
[18:0]
[15:0]
up_rd
[11:0]
up_d
up_a
[4:0]
sr_d
[7:0]
sr_a
or
or
I/O
I/O Static Memory Data Bus. Data Bus to exchange data between the MT90223 and the
I/O Processor Data Bus. Data Bus to exchange data between the MT90223 and a local
O Static Memory Address Bus. Address bus on the external static memory.
O Static Memory Read/Not Write. If low, data is written from the MT90223 to the
O Static Memory Chip Select Signal. Active low.
O Processor Interrupt Request. Open drain signal. If this signal is low, the MT90223
I
I
I
I
I
Receive Address. Five bit wide address bus driven from the ATM to PHY device to
select the appropriate PHY address. URxAddr[4] is the MSB.
external static memory. sr_d[7:0] has internal weak pull-downs.
memory. If high, data is read from the memory to the MT90223.
processor.
Processor Address Bus. Used to select the internal registers and memory locations
of the MT90223.
Processor Read/Not Write. Motorola Mode. This is an input signal. If low, data is
written from the processor to the MT90223. If high, data is read from the MT90223 to
the processor.
Processor Not Write (Intel Mode). This is an input signal, active low. If low, data is
written from the processor to the MT90223.
Output enable (Motorola Mode). This is an input signal. This signal should be tied to
GND for Motorola timing mode.
Processor Read (Intel Mode). This is an input signal, active low. If low, data is read
from the MT90223.
Chip Select. This is an active low input signal. If this signal is high, the MT90223
ignores all other signals on its processor bus. If this signal is low, the MT90223
accepts the signals on its processor bus.
signals to the processor that an interrupt condition is pending inside the MT90223.
Receiver Static Memory Interface Signals
Processor Interface Signals
Zarlink Semiconductor Inc.
MT90222/3/4
21
Description
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