MC9328MX1/D ETC, MC9328MX1/D Datasheet - Page 73
MC9328MX1/D
Manufacturer Part Number
MC9328MX1/D
Description
i.MX Integrated Portable System Processor
Manufacturer
ETC
Datasheet
1.MC9328MX1D.pdf
(96 pages)
- Current page: 73 of 96
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3.17 Pulse-Width Modulator
The PWM can be programmed to select one of two clock signals as its source frequency. The selected clock signal
is passed through a divider and a prescaler before being input to the counter. The output is available at the pulse-
width modulator output (PWMO) external pin.
Freescale Semiconductor
Ref No.
11
12
13
14
15
16
1.
2.
3.
4.
Ref
No.
2a
2b
1
Loading capacitor condition is less than or equal to 30pF.
An external resistor (100 ~ 200 ohm) should be inserted in series to provide current control on the MS_SDIO pin,
because of a possibility of signal conflict between the MS_SDIO pin and Memory Stick SDIO pin when the pin
direction changes.
If the MSC2[RED] bit = 0, MSHC samples MS_SDIO input data at MS_SCLKO rising edge.
If the MSC2[RED] bit = 1, MSHC samples MS_SDIO input data at MS_SCLKO falling edge.
MS_BS delay time
MS_SDIO output delay time
MS_SDIO input setup time for MS_SCLKO rising edge (RED bit = 0)
MS_SDIO input hold time for MS_SCLKO rising edge (RED bit = 0)
MS_SDIO input setup time for MS_SCLKO falling edge (RED bit = 1)
MS_SDIO input hold time for MS_SCLKO falling edge (RED bit = 1)
System CLK frequency
Clock high time
Clock low time
System Clock
Parameter
PWM Output
Table 32. MSHC Signal Timing Parameter Table (Continued)
1
1
1
Table 33. PWM Output Timing Parameter Table
Figure 56. PWM Output Timing Diagram
1
1,2
MC9328MX1 Advance Information, Rev. 4
Parameter
Minimum
2a
3.3
7.5
0
4a
1.8V +/- 0.10V
2b
Maximum
87
–
–
1
3a
3
4
3
4
Minimum
5/10
5/10
0
3.0V +/- 0.30V
Minimum
3b
4b
18
23
–
–
0
0
Maximum
100
–
–
Maximum
Specifications
3
3
–
–
–
–
MHz
Unit
ns
ns
Unit
ns
ns
ns
ns
ns
ns
73
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