GS1503BCVE2 GENNUM [Gennum Corporation], GS1503BCVE2 Datasheet - Page 42

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GS1503BCVE2

Manufacturer Part Number
GS1503BCVE2
Description
HD Embedded Audio CODEC Data Sheet
Manufacturer
GENNUM [Gennum Corporation]
Datasheet
4.11.1 Arbitrary Data Multiplexing In External Pin Mode
This is the default mode for multiplexing arbitrary data packets. The GS1503B will set
the PKTENO external pin HIGH when arbitrary data can be input to the device. Two
VCLK cycles after PKTENO goes HIGH, the user should set the PKTEN arbitrary packet
enable pin HIGH. Two VCLK cycles after PKTEN is set HIGH, arbitrary data can be input
at the PKT[7:0] bus. See
The user is required to enter the following arbitrary data: Data ID (DID), Secondary Data
ID (SDID), Data Count (DC) and User Data Words (UDW: maximum of 255), via the
PKT[7-0] pins. This GS1503B automatically generates the Ancillary Data Flag (ADF),
Checksum (CS) and bit 8 (Parity Bit) and bit 9 (Not bit 8).
The PKTENO pin will be set HIGH on all video lines except the two lines following the
video switching point. For example, with the default setting of line 7 field 1, PKTENO
will not be set HIGH on lines 8 and 9. The switching point is set in the SW_LNA[12:0] and
SW_LNB[12:0] Host Interface registers for field 1 and field 2 respectively. See
Switching Line Setting on page
Figure 4-22: Arbitrary Data Packet Input Timing Diagram
GS1503B HD Embedded Audio CODEC
Data Sheet
37953 - 1
PKTENO
PKT[7:0]
Arbitrary
PKTEN
Packet
VCLK
2 CLKs
December 2009
Y/C
Arbitrary Data Packet Timing
Arbitrary Data Input Enable
Arbitrary Data
2 CLKs
b
/ C
Figure 4-22
r
[19:0]
35.
for timing.
Automatically generated by the GS1503B
VIN[19:0]
PKTENO
PKTEN
PKT[7:0]
GS1503B
Arbitrary Data
Video
2 CLKs
2 CLKs
42 of 90

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