LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 540

• Manufacturer Part Number: LM3S2965-IRN50-A1T
• Description: Microcontroller
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Electrical Characteristics
23.2.6
23.2.7
540
Figure 23-2. I
Hibernation Module
The Hibernation Module requires special system implementation considerations since it is intended
to power-down all other sections of its host device. The system power-supply distribution and
interfaces of the system must be driven to 0 V
by HIB.
The regulators controlled by HIB are expected to have a settling time of 250 μs or less.
Table 23-13. Hibernation Module Characteristics
a. This parameter is highly sensitive to PCB layout and trace lengths, which may make this parameter time longer. Care
Figure 23-3. Hibernation Module Timing
Synchronous Serial Interface (SSI)
Table 23-14. SSI Characteristics
Parameter No
Parameter No.
32.768 KHz
(internal)
must be taken in PCB design to minimize trace lengths and RLC (resistance, inductance, capacitance).
/WAKE
H1
H2
H3
H4
H5
H6
H7
I2CSDA
S1
I2CSCL
/HIB
t
t
t
HIB_REG_WRITE
HIB_TO_VDD
Parameter
2
t
WAKE_ASSERT
XOSC_SETTLE
Parameter
t
C Timing
I1
WAKETOHIB
t
t
t
HIB_HIGH
HIB_LOW
clk_per
H1
Parameter Name
SSIClk cycle time
Internal 32.768 KHz clock reference rising edge to /HIB asserted
Internal 32.768 KHz clock reference rising edge to /HIB deasserted
/WAKE assertion time
/WAKE assert to /HIB desassert
XOSC settling time
Time for a write to non-volatile registers in HIB module to complete
HIB deassert to VDD and VDD25 at minimum operational level
I2
I4
Preliminary
a
DC
Parameter Name
I6
or powered down with the same regulator controlled
I7
Min
2
Nom
-
H3
65024
Max
H4
I5
I8
system clocks
H2
Unit
I3
November 30, 2007
Min
62
62
20
92
-
-
-
Nom
200
30
-
-
-
-
-
Max
124
250
I9
-
-
-
-
-
Unit
ms
μs
μs
μs
μs
μs
μs