LM3S2965-IRN50-A1T ETC2 [List of Unclassifed Manufacturers], LM3S2965-IRN50-A1T Datasheet - Page 289
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LM3S2965-IRN50-A1T
Manufacturer Part Number
LM3S2965-IRN50-A1T
Description
Microcontroller
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
1.LM3S2965-IRN50-A1T.pdf
(574 pages)
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ADC Sample Sequence FIFO 0 Status (ADCSSFSTAT0)
Base 0x4003.8000
Offset 0x04C
Type RO, reset 0x0000.0100
November 30, 2007
Reset
Reset
Type
Type
Bit/Field
31:13
11:9
7:4
3:0
12
8
RO
RO
31
15
0
0
Register 17: ADC Sample Sequence FIFO 0 Status (ADCSSFSTAT0), offset
0x04C
Register 18: ADC Sample Sequence FIFO 1 Status (ADCSSFSTAT1), offset
0x06C
Register 19: ADC Sample Sequence FIFO 2 Status (ADCSSFSTAT2), offset
0x08C
Register 20: ADC Sample Sequence FIFO 3 Status (ADCSSFSTAT3), offset
0x0AC
This register provides a window into the Sample Sequencer, providing full/empty status information
as well as the positions of the head and tail pointers. The reset value of 0x100 indicates an empty
FIFO. The ADCSSFSTAT0 register provides status on FIF0, ADCSSFSTAT1 on FIFO1,
ADCSSFSTAT2 on FIFO2, and ADCSSFSTAT3 on FIFO3.
reserved
RO
RO
30
14
0
0
reserved
reserved
EMPTY
Name
HPTR
TPTR
FULL
RO
RO
29
13
0
0
FULL
RO
RO
28
12
0
0
RO
RO
Type
27
11
0
0
RO
RO
RO
RO
RO
RO
reserved
RO
RO
26
10
0
0
Reset
0x00
0x00
0x00
0x00
0
1
RO
RO
25
0
9
0
Preliminary
EMPTY
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
FIFO Full
When set, indicates that the FIFO is currently full.
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
FIFO Empty
When set, indicates that the FIFO is currently empty.
FIFO Head Pointer
This field contains the current "head" pointer index for the FIFO, that is,
the next entry to be written.
FIFO Tail Pointer
This field contains the current "tail" pointer index for the FIFO, that is,
the next entry to be read.
RO
RO
24
0
8
1
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
HPTR
RO
RO
21
0
5
0
RO
RO
20
0
4
0
LM3S2965 Microcontroller
RO
RO
19
0
3
0
RO
RO
18
0
2
0
TPTR
RO
RO
17
0
1
0
RO
RO
16
0
0
0
289
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