ST7FL15F1MAE STMICROELECTRONICS [STMicroelectronics], ST7FL15F1MAE Datasheet - Page 43

• Manufacturer Part Number: ST7FL15F1MAE
• Description: 8-bit MCU for automotive with single voltage Flash/ROM memory, data EEPROM, ADC, 5 timers, SPI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

10 I/O PORTS
10.1 INTRODUCTION
The I/O ports allow data transfer. An I/O port con-
tains up to eight pins. Each pin can be pro-
grammed independently either as a digital input or
digital output. In addition, specific pins may have
several other functions. These functions can in-
clude external interrupt, alternate signal input/out-
put for on-chip peripherals or analog input.
10.2 FUNCTIONAL DESCRIPTION
A Data Register (DR) and a Data Direction Regis-
ter (DDR) are always associated with each port.
The Option Register (OR), which allows input/out-
put options, may or may not be implemented. The
following description takes into account the OR
register. Refer to the Port Configuration table for
device specific information.
An I/O pin is programmed using the corresponding
bits in the DDR, DR and OR registers: Bit x corre-
sponding to pin x of the port.
Figure 29
10.2.1 Input Modes
Clearing the DDRx bit selects input mode. In this
mode, reading its DR bit returns the digital value
from that I/O pin.
If an OR bit is available, different input modes can
be configured by software: Floating or pull-up. Re-
fer to
for configuration.
Notes:
1. Writing to the DR modifies the latch value but
does not change the state of the input pin.
2. Do not use read/modify/write instructions
(BSET/BRES) to modify the DR register.
10.2.1.1 External Interrupt Function
External interrupt capability is selected using the
EISR register. If EISR bits are <> 0, the corre-
sponding pin is used as external interrupt. In this
case, the ORx bit can select the pin as either inter-
rupt floating or interrupt pull-up. In this configura-
tion, a signal edge or level input on the I/O gener-
ates an interrupt request via the corresponding in-
terrupt vector (eix).
Falling or rising edge sensitivity is programmed in-
dependently for each interrupt vector. The Exter-
nal Interrupt Control Register (EICR) or the Miscel-
laneous Register controls this sensitivity, depend-
ing on the device.
Section 10.3 I/O PORT IMPLEMENTATION
shows the generic I/O block diagram.
A device may have up to seven external interrupts.
Several pins may be tied to one external interrupt
vector. Refer to
see which ports have external interrupts.
If several I/O interrupt pins on the same interrupt
vector are selected simultaneously, they are logi-
cally combined. For this reason, if one of the inter-
rupt pins is tied low, it may mask the others.
External interrupts are hardware interrupts. Fetch-
ing the corresponding interrupt vector automatical-
ly clears the request latch. Changing the sensitivity
of a particular external interrupt clears this pending
interrupt. This can be used to clear unwanted
pending interrupts.
Spurious interrupts
When enabling/disabling an external interrupt by
setting/resetting the related OR register bit, a spu-
rious interrupt is generated if the pin level is low
and its edge sensitivity includes falling/rising edge.
This is due to the edge detector input, which is
switched to '1' when the external interrupt is disa-
bled by the OR register.
To avoid this unwanted interrupt, a "safe" edge
sensitivity (rising edge for enabling and falling
edge for disabling) must be selected before
changing the OR register bit and configuring the
appropriate sensitivity again.
Caution: If a pin level change occurs during these
operations (asynchronous signal input), as inter-
rupts are generated according to the current sen-
sitivity, it is advised to disable all interrupts before
and to re-enable them after the complete previous
sequence in order to avoid an external interrupt
occurring on the unwanted edge.
This corresponds to the following steps:
1. To enable an external interrupt:
2. To disable an external interrupt:
– Set the interrupt mask with the SIM instruction
– Select rising edge
– Enable the external interrupt through the OR
– Select the desired sensitivity if different from
– Reset the interrupt mask with the RIM instruc-
(in cases where a pin level change could oc-
cur)
register
rising edge
tion (in cases where a pin level change could
occur)
“PIN DESCRIPTION” on page 5
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