ST7FL15F1MAE STMICROELECTRONICS [STMicroelectronics], ST7FL15F1MAE Datasheet - Page 106

• Manufacturer Part Number: ST7FL15F1MAE
• Description: 8-bit MCU for automotive with single voltage Flash/ROM memory, data EEPROM, ADC, 5 timers, SPI
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

ST7L15, ST7L19
ELECTRICAL CHARACTERISTICS (cont’d)
13.4 SUPPLY CURRENT CHARACTERISTICS
The following current consumption specified for
the ST7 functional operating modes over tempera-
ture range does not take into account the clock
source current consumption. To obtain the total
device consumption, the two current values must
be added (except for HALT mode for which the
clock is stopped).
13.4.1 Supply Current
T
Notes:
1. CPU running with memory access, all I/O pins in input mode with a static value at V
in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.
2. All I/O pins in input mode with a static value at V
driven by external square wave, LVD disabled.
3. SLOW mode selected with f
V
4. SLOW-WAIT mode selected with f
V
5. All I/O pins in output mode with a static value at V
tested in production at V
6. All I/O pins in input mode with a static value at V
max.
7. This consumption refers to the Halt period only and not the associated run period which is software dependent.
Figure 67. Typical I
106/138
Symbol
I
SS
DD
Note: Graph displays data beyond the normal operating range of 3V - 5.5V
A
DD
= -40 to +125°C, unless otherwise specified.
(no load), all peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.
or V
9
8
7
6
5
4
3
2
1
0
2
SS
Supply current in RUN mode
Supply current in WAIT mode
Supply current in SLOW mode
Supply current in SLOW WAIT mode
Supply current in HALT mode
Supply current in AWUFH mode
Supply current in ACTIVE HALT mode
(no load), all peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.
2.5
.5
1
2
4
6
8
3
3.5
DD
DD
Parameter
in RUN vs f
max and f
4
Vdd (V)
CPU
4.5
based on f
5
CPU
CPU
5)
CPU
5.5
based on f
max.
6)7)
OSC
6
DD
divided by 32. All I/O pins in input mode with a static value at V
6.5
DD
SS
OSC
V
or V
or V
DD
(no load), LVD disabled. Data based on characterization results,
divided by 32. All I/O pins in input mode with a static value at
= 5.5V
SS
SS
(no load), all peripherals in reset state; clock input (CLKIN)
(no load). Data tested in production at V
Figure 68. Typical I
Note: Graph displays data beyond the normal operating range of 3V - 5.5V
Note: Graph displays data beyond the normal operating range of 3V - 5.5V
9
8
7
6
5
4
3
2
1
0
Conditions
2
f
-40°C ≤ T
-40°C ≤ T
f
f
f
-40°C ≤ T
CPU
CPU
CPU
CPU
2.5
= 8 MHz
= 8 MHz
= 250 kHz
= 250 kHz
A
A
A
3
≤ +125°C
≤ +125°C
≤ +125°C
1)
2)
3)
4)
3.5
DD
DD
or V
4
in RUN at f
Vdd (V)
SS
4.5
TBD
Typ
0.7
0.5
60
(no load), all peripherals
7
3
1
5
DD
CPU
TBD
Max
3.6
0.9
0.8
max. and f
9
6
5.5
= 8 MHz
140°C
90°C
25°C
-5°C
-45°C
6
Unit
mA
mA
µA
DD
CPU
6.5
or