LPC2917/01 NXP [NXP Semiconductors], LPC2917/01 Datasheet - Page 48
LPC2917/01
Manufacturer Part Number
LPC2917/01
Description
ARM9 microcontroller with CAN and LIN
Manufacturer
NXP [NXP Semiconductors]
Datasheet
1.LPC291701.pdf
(86 pages)
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NXP Semiconductors
LPC2917_19_01_2
Preliminary data sheet
Fig 12. Block diagram of the CGU0
CLOCK GENERATION UNIT (CGU0)
400 kHz LP_OSC
OSCILLATOR
EXTERNAL
FREQUENCY
MONITOR
For generation of these base clocks, the CGU consists of primary and secondary clock
generators and one output generator for each base clock.
There are two primary clock generators: a low-power ring oscillator (LP_OSC) and a
crystal oscillator. See
LP_OSC is the source for the BASE_PCR_CLK that clocks the CGU0 itself and for
BASE_SAFE_CLK that clocks a minimum of other logic in the device (like the watchdog
timer). To prevent the device from losing its clock source LP_OSC cannot be put into
power-down. The crystal oscillator can be used as source for high-frequency clocks or as
an external clock input if a crystal is not connected.
Secondary clock generators are a PLL and seven fractional dividers (FDIV0..6). The PLL
has three clock outputs: normal, 120 phase-shifted and 240 phase-shifted.
PLL
clkout
clkout120
clkout240
DETECTION
CLOCK
Figure
Rev. 02 — 17 June 2009
AHB TO DTL BRIDGE
12.
FDIV0
FDIV1
FDIV6
LPC2917/01; LPC2919/01
ARM9 microcontroller with CAN and LIN
OUT 0
OUT 1
OUT 2
OUT 3
OUT 11
002aae147
© NXP B.V. 2009. All rights reserved.
BASE_SAFE_CLK
BASE_SYS_CLK
BASE_PCR_CLK
BASE_IVNSS_CLK
BASE_ICLK1_CLK
48 of 86
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