LPC2917/01 NXP [NXP Semiconductors], LPC2917/01 Datasheet - Page 34

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LPC2917/01

Manufacturer Part Number
LPC2917/01
Description
ARM9 microcontroller with CAN and LIN
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
LPC2917_19_01_2
Preliminary data sheet
6.12.6.3 Clock description
6.13.1.1 Global acceptance filter
6.13.1.2 Pin description
6.13.1 CAN gateway
6.13 Networking subsystem
The GPIO modules are clocked by several clocks, all of which are derived from
BASE_SYS_CLK; CLK_SYS_PESS and CLK_SYS_GPIOx (x = 0, 1, 2, 3), see
Section
power management. The frequency of all clocks CLK_SYS_GPIOx is identical to
CLK_SYS_PESS since they are derived from the same base clock BASE_SYS_CLK.
Controller Area Network (CAN) is the definition of a high-performance communication
protocol for serial data communication. The two CAN controllers in the LPC2917/2919/01
provide a full implementation of the CAN protocol according to the CAN specification
version 2.0B . The gateway concept is fully scalable with the number of CAN controllers,
and always operates together with a separate powerful and flexible hardware acceptance
filter.
The key features are:
The global acceptance filter provides look-up of received identifiers - called acceptance
filtering in CAN terminology - for all the CAN controllers. It includes a CAN ID look-up table
memory, in which software maintains one to five sections of identifiers. The CAN ID
look-up table memory is 2 kB large (512 words, each of 32 bits). It can contain up to 1024
standard frame identifiers or 512 extended frame identifiers or a mixture of both types. It is
also possible to define identifier groups for standard and extended message formats.
The two CAN controllers in the LPC2917/2919/01 have the pins listed below. The CAN
pins are combined with other functions on the port pins of the LPC2917/2919/01.
shows the CAN pins (x runs from 0 to 1).
Table 19.
Symbol
CANx TXD
CANx RXD
Supports 11-bit as well as 29-bit identifiers
Double receive buffer and triple transmit buffer
Programmable error-warning limit and error counters with read/write access
Arbitration-lost capture and error-code capture with detailed bit position
Single-shot transmission (i.e. no re-transmission)
Listen-only mode (no acknowledge; no active error flags)
Reception of ‘own’ messages (self-reception request)
FullCAN mode for message reception
6.7.2. Note that each GPIO has its own CLK__SYS_GPIOx branch clock for
CAN pins
Pin name
TXDC0/1
RXDC0/1
Rev. 02 — 17 June 2009
Direction
OUT
IN
LPC2917/01; LPC2919/01
Description
CAN channel x transmit data output
CAN channel x receive data input
ARM9 microcontroller with CAN and LIN
© NXP B.V. 2009. All rights reserved.
Table 19
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