LPC2917/01 NXP [NXP Semiconductors], LPC2917/01 Datasheet - Page 44

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LPC2917/01

Manufacturer Part Number
LPC2917/01
Description
ARM9 microcontroller with CAN and LIN
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
LPC2917_19_01_2
Preliminary data sheet
6.14.5.5 Clock description
6.14.6.1 Pin description
6.14.6.2 Clock description
6.14.6 Timers in the MSCSS
6.14.7 Quadrature Encoder Interface (QEI)
The PWM modules are clocked by CLK_MSCSS_PWMx (x = 0 - 3), see
Note that each PWM has its own CLK_MSCSS_PWMx branch clock for power
management. The frequency of all these clocks is identical to CLK_MSCSS_APB since
they are derived from the same base clock BASE_MSCSS_CLK.
Also note that unlike the timer modules in the Peripheral SubSystem, the actual timer
counter registers of the PWM modules run at the same clock as the APB system interface
CLK_MSCSS_APB. This clock is independent of the AHB system clock.
If a PWM module is not used its CLK_MSCSS_PWMx branch clock can be switched off.
The two timers in the MSCSS are functionally identical to the timers in the peripheral
subsystem, see
the timers in the peripheral subsystem, but the capture inputs and match outputs are not
available on the device pins. These signals are instead connected to the ADC and PWM
modules as outlined in the description of the MSCSS, see
See section
MSCSS timer 0 has no external pins.
MSCSS timer 1 has a PAUSE pin available as external pin. The PAUSE pin is combined
with other functions on the port pins of the LPC2917/2919/01.
timer 1 external pin.
Table 24.
The Timer modules in the MSCSS are clocked by CLK_MSCSS_MTMRx (x = 0 to 1), see
Section
power management. The frequency of all these clocks is identical to CLK_MSCSS_APB
since they are derived from the same base clock BASE_MSCSS_CLK.
Note that, unlike the timer modules in the Peripheral SubSystem, the actual timer counter
registers run at the same clock as the APB system interface CLK_MSCSS_APB. This
clock is independent of the AHB system clock.
If a timer module is not used its CLK_MSCSS_MTMRx branch clock can be switched off.
A quadrature encoder, also known as a 2-channel incremental encoder, converts angular
displacement into two pulse signals. By monitoring both the number of pulses and the
relative phase of the two signals, the user can track the position, direction of rotation, and
velocity. In addition, a third channel, or index signal, can be used to reset the position
counter. The quadrature encoder interface decodes the digital pulses from a quadrature
encoder wheel to integrate position over time and determine direction of rotation. In
addition, the QEI can capture the velocity of the encoder wheel.
Symbol
MSCSS PAUSE
6.7.2. Note that each timer has its own CLK_MSCSS_MTMRx branch clock for
MSCSS timer 1 pin
Section 6.12.3
Section
Direction
IN
Rev. 02 — 17 June 2009
6.12.3. The features of the timers in the MSCSS are the same as
for a functional description of the timers.
Description
pause pin for MSCSS timer 1
LPC2917/01; LPC2919/01
ARM9 microcontroller with CAN and LIN
Section
Table 24
6.14.1.
shows the MSCSS
© NXP B.V. 2009. All rights reserved.
Section
6.7.2.
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