LPC2917/01 NXP [NXP Semiconductors], LPC2917/01 Datasheet - Page 33

• Manufacturer Part Number: LPC2917/01
• Description: ARM9 microcontroller with CAN and LIN
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
LPC2917_19_01_2
Preliminary data sheet
6.12.5.3 Clock description
6.12.6.1 Functional description
6.12.6.2 Pin description
6.12.6 General-purpose I/O
The SPI modules are clocked by two different clocks; CLK_SYS_PESS and CLK_SPIx
(x = 0, 1, 2), see
power management. The frequency of all clocks CLK_SPIx is identical as they are derived
from the same base clock BASE_CLK_SPI. The register interface towards the system bus
is clocked by CLK_SYS_PESS. The serial-clock rate divisor is clocked by CLK_SPIx.
The SPI clock frequency can be controlled by the CGU. In master mode the SPI clock
frequency (CLK_SPIx) must be set to at least twice the SPI serial clock rate on the
interface. In slave mode CLK_SPIx must be set to four times the SPI serial clock rate on
the interface.
The LPC2917/2919/01 contains four general-purpose I/O ports located at different
peripheral base addresses. All I/O pins are bidirectional, and the direction can be
programmed individually. The I/O pad behavior depends on the configuration programmed
in the port function-select registers.
The key features are:
The general-purpose I/O provides individual control over each bidirectional port pin. There
are two registers to control I/O direction and output level. The inputs are synchronized to
achieve stable read-levels.
To generate an open-drain output, set the bit in the output register to the desired value.
Use the direction register to control the signal. When set to output, the output driver
actively drives the value on the output: when set to input the signal floats and can be
pulled up internally or externally.
The five GPIO ports in the LPC2917/2919/01 have the pins listed below. The GPIO pins
are combined with other functions on the port pins of the LPC2917/2919/01.
shows the GPIO pins.
Table 18.
Symbol
GPIO0 pin[31:0]
GPIO1 pin[31:0]
GPIO2 pin[27:0]
GPIO3 pin[15:0]
•
•
•
•
General-purpose parallel inputs and outputs
Direction control of individual bits
Synchronized input sampling for stable input-data values
All I/O defaults to input at reset to avoid any possible bus conflicts
GPIO pins
Section
Pin name
P0[31:0]
P1[31:0]
P2[27:0]
P3[15:0]
Rev. 02 — 17 June 2009
6.7.2. Note that each SPI has its own CLK_SPIx branch clock for
Direction
IN/OUT
IN/OUT
IN/OUT
IN/OUT
LPC2917/01; LPC2919/01
Description
GPIO port x pins 31 to 0
GPIO port x pins 31 to 0
GPIO port x pins 27 to 0
GPIO port x pins 15 to 0
ARM9 microcontroller with CAN and LIN
© NXP B.V. 2009. All rights reserved.
Table 18
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