ATMEGA2561V ATMEL [ATMEL Corporation], ATMEGA2561V Datasheet - Page 290
ATMEGA2561V
Manufacturer Part Number
ATMEGA2561V
Description
8-bit Microcontroller with 64K/128K/256K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA2561V.pdf
(449 pages)
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Offset Compensation
Schemes
ADC Accuracy Definitions
290
ATmega640/1280/1281/2560/2561
The stage has a built-in offset cancellation circuitry that nulls the offset of differential
measurements as much as possible. The remaining offset in the analog path can be
measured directly by selecting the same channel for both differential inputs. This offset
residue can be then subtracted in software from the measurement results. Using this
kind of software based offset correction, offset on any channel can be reduced below
one LSB.
An n-bit single-ended ADC converts a voltage linearly between GND and V
steps (LSBs). The lowest code is read as 0, and the highest code is read as 2
Several parameters describe the deviation from the ideal behavior:
•
Figure 123. Offset Error
•
Figure 124. Gain Error
Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal
transition (at 0.5 LSB). Ideal value: 0 LSB.
Gain Error: After adjusting for offset, the Gain Error is found as the deviation of the
last transition (0x3FE to 0x3FF) compared to the ideal transition (at 1.5 LSB below
maximum). Ideal value: 0 LSB
Output Code
Output Code
Offset
Error
Gain
Error
V
V
REF
REF
Input Voltage
Input Voltage
Ideal ADC
Actual ADC
Ideal ADC
Actual ADC
2549K–AVR–01/07
n
-1.
REF
in 2
n
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