STC4130-I ETC2 [List of Unclassifed Manufacturers], STC4130-I Datasheet - Page 39

• Manufacturer Part Number: STC4130-I
• Description: Synchronous Clock for SETS
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Default value: 2.
CLK6_Sel, 0x5c (R/W)
Selects or disables the CLK6 output. Default = 0110, 2.048MHz:
Default value: 1.
CLK7_Sel, 0x5d (R/W)
Selects or disables the CLK7 output.
Default value: 2.
Intr_Event, 0x5e (R/W)
Address
Address
Address
0x5d
0x5e
0x5c
reference
from non-
T4 cross
changed
Event 7:
active to
active
Bit7
Bit7
Bit7
© Copyright 2006 The Connor-Winfield Corp.
from active
reference
T4 cross
changed
Event 6:
to non-
active
Bit6
Bit6
Bit6
Not used
T4 DPLL
changed
Event 5:
Data Sheet #: TM084
0x5b, bits 1 ~ 0
0x5c, bits 3 ~ 0
0x5d, bits 1 ~ 0
status
Bit5
Bit5
Bit5
10
11
12
13
Not used
1
2
3
0
1
2
3
4
5
9
0
1
2
3
changed in
auto selec-
tion mode
reference
T4 active
Event 4:
Bit4
Bit4
Bit4
CLK5 output
CLK6 output
CLK7 output
16.384MHz
32.768MHz
24.704MHz
All Rights Reserved
2.048MHz
4.096MHz
8.192MHz
1.544MHz
3.088MHz
6.176MHz
12.352Hz
Disabled
Disabled
Disabled
Disabled
DS3
E3
T1
E1
reference
from non-
T0 cross
changed
active to
Event 3:
Page 39 of 44
active
Bit3
Bit3
Bit3
Synchronous Clock for SETS
Specifications subject to change without notice
from active
reference
T0 cross
changed
Event 2:
to non-
active
Bit2
Bit2
Bit2
CLK6 Select
Rev: P02
STC4130
T0 DPLL
changed
Event 1:
status
Data Sheet
Bit1
Bit1
Bit1
CLK7 Select
Date: 12/5/06
changed in
auto selec-
tion mode
reference
T0 active
Event 0:
Bit0
Bit0
Bit0