STC4130-I ETC2 [List of Unclassifed Manufacturers], STC4130-I Datasheet - Page 28

• Manufacturer Part Number: STC4130-I
• Description: Synchronous Clock for SETS
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Bucket_Size, 0x0b (R/W)
Sets the leaky bucket size for the reference activity monitor. Bucket size must be greater than or equal to the
alarm assert value. Invalid values will not be written to the register.
Default value: 20.
Assert_Threshold, 0x0c (R/W)
Sets the leaky bucket alarm assert threshold for the reference activity monitor. The alarm assert threshold
value must be greater than the de-assert threshold value and less than or equal to the bucket size value.
Invalid values will not be written to the register.
Default value: 15.
De_Assert_Threshold, 0x0d (R/W)
Sets the leaky bucket alarm de-assert threshold for the reference activity monitor. The de-assert threshold
value must be less than the assert threshold value. Invalid values will not be written to the register.
Default value: 10.
Freerun_Cal, 0x0e (R/.W)
Freerun TCXO/OCXO calibration, from -102.4 to +102.3 ppm, in .1ppm steps, two’s complement.
Default value: 0.
Disqualification_Range, 0x10 (R/W)
Reference disqualification range, from 0 to +102.3 ppm, in 0.1 ppm steps. This also sets the pull-in range,
beyond which, in manual mode, a reference will either not be synchronized to or no longer will be followed
(depending on the state of the OOP bits in the T0/4_Control_Mode registers).
Default value: 110.
Address
Address
Address
Address
Address
0x0b
0x0d
0x0e
0x10
0x0c
0x11
0x0f
Bit7
Bit7
Bit7
Bit7
Bit7
Not used
Not used
Not used
© Copyright 2006 The Connor-Winfield Corp.
Bit6
Bit6
Bit6
Bit6
Bit6
Not used
Not used
Data Sheet #: TM084
Bit5
Bit5
Bit5
Bit5
Bit5
Bit4
Bit4
Bit4
Bit4
Bit4
Leaky bucket alarm de-assert threshold, 0 ~ 63
Leaky bucket alarm assert threshold, 0 ~ 63
Lower 8 bits
Lower 8 bits
All Rights Reserved
Leaky bucket size, 0 ~ 63
Page 28 of 44
Bit3
Bit3
Bit3
Bit3
Bit3
Synchronous Clock for SETS
Specifications subject to change without notice
Bit2
Bit2
Bit2
Bit2
Bit2
Rev: P02
Upper 3 bits
Upper 3 bits
STC4130
Data Sheet
Bit1
Bit1
Bit1
Bit1
Bit1
Date: 12/5/06
Bit0
Bit0
Bit0
Bit0
Bit0