STC4130-I ETC2 [List of Unclassifed Manufacturers], STC4130-I Datasheet - Page 33

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STC4130-I

Manufacturer Part Number
STC4130-I
Description
Synchronous Clock for SETS
Manufacturer
ETC2 [List of Unclassifed Manufacturers]
Datasheet
T0_Priority_Table, 0x31 (R/W)
Reference priority for automatic reference selection mode. Lower values have higher priority:
Default value: 0.
T0_PLL_Status, 0x37 (R)
SYNC: Indicates synchronization has been achieved
LOS: Loss of signal
LOL: Loss of lock
OOP: Out of pull-in range
LHC: Long Term History Complete
LHA: Long Term History Available
T0_Accu_Flush, 0x38 (W)
Writing to this register will perform a flush of the accumulated history. The value of bit zero determines which
histories are flushed. Bit 0 = 0, Flush T0 current history only; bit 0 = 1, flush all T0 histories.
T4_Control_Mode, 0x39 (R/W)
Address
Address
Address
Address
0x37
0x38
0x39
0x31
0x32
0x33
0x34
0x35
0x36
1=Available
available
0=Not
Bit7
LHA
Bit7
Bit7
Bit7
Not used
© Copyright 2006 The Connor-Winfield Corp.
0=Not com-
1=Com-
plete
plete
LHC
Bit6
Bit6
Bit6
Bit6
Ref 10 Priority
Ref 12 Priority
Ref 2 Priority
Ref 4 Priority
Ref 6 Priority
Ref 8 Priority
0x31 - 0x36, 4 bits
OOP: Out
of Pull-in
range:
0=Follow
1=Don’t fol-
low
Data Sheet #: TM084
0001 ~ 1111
Bit5
Bit5
Bit5
Bit5
0000
Reserved
0=Manual
Not used
Manual/
1=Auto
Bit4
Auto
Bit4
Bit4
Bit4
Reference Priority
Disable reference
All Rights Reserved
0=In range
1 ~ 15
Revertive
1=Rever-
1=Out of
revertive
Page 33 of 44
0=Non-
pull-in
range
OOP
Bit3
Bit3
Bit3
Bit3
tive
Synchronous Clock for SETS
Specifications subject to change without notice
Accu_Usage
0=No LOL
1=LOL
1=User
0=LTH
Bit2
Bit2
LOL
Bit2
Bit2
Ref 11 Priority
Ref 1 Priority
Ref 3 Priority
Ref 5 Priority
Ref 7 Priority
Ref 9 Priority
Rev: P02
STC4130
0=No LOS
1=LOS
Data Sheet
Bit1
Bit1
LOS
Bit1
Bit1
Date: 12/5/06
Align Mode
0=No Sync
0=Arbitrary
HO flush
1=Sync
1=Align
SYNC:
Phase
Bit0
Bit0
Bit0
Bit0

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