STC4130-I ETC2 [List of Unclassifed Manufacturers], STC4130-I Datasheet - Page 10

• Manufacturer Part Number: STC4130-I
• Description: Synchronous Clock for SETS
• Manufacturer: ETC2 [List of Unclassifed Manufacturers]

Detailed Description
Chip Master Clock Input
The device operates with an external OCXO or
TCXO as its master clock, connected to the MCLK
input, pin 99. This may be at either 10 MHz or 20
MHz, MCLK_FRQ_SEL pin 98 = 0 for 10 MHZ, 1 for
20 MHZ.
The external TCXO or OCXO may be calibrated,
(thus calibrating the freerun output frequency of the
chip) by writing an offset to the Freerun_Cal register,
(0x0e/0f),
steps, in two’s complement form. (See Register
Descriptions section for details regarding register
references in this section.)
Reference Input Monitoring and Qualifi-
cation
The STC4130 accepts 12 external reference inputs
at 8kHz, 64kHz, 1.544MHz, 2.048MHz, 19.44MHz,
38.88MHz, or 77.76MHz. Input frequencies are
detected automatically. The autodetected frequency
of any reference may be read by selecting the refer-
ence in the Ref_Selector register (0x15) and then
reading the frequency from bits 4 - 6 of register
Ref_Frq_Offset (0x17).
Each input is monitored and qualified for activity and
frequency offset. Activity monitoring is accomplished
with a leaky bucket accumulation algorithm, as
shown in figure 2. The “leaky bucket” accumulator
has a fill rate window that may be set from 1 to 16
ms, where any hit of signal abnormality (or multiple
hits) during the window increments the bucket count
by one. The leak rate is 1/n
may be set from 1 to 16, corresponding to a leak rate
window n x the fill rate window size. The leaky bucket
accumulator decrements by one for each leak rate
window that passes with no signal abnormality. Both
windows operate in a consecutive, non-overlapping
manner. The bucket accumulator has alarm assert
and alarm de-assert thresholds that can each be pro-
grammed from 0 to 63.
The fill rate is written to the Fill_Rate register, 0x09,
and the leak rate is written to register Leak_Rate,
0x0a. The bucket size is written to register
Bucket_Size (0x0b). The alarm assert threshold is
written to register Assert_Threshold (0x0c), and the
from -102.4 to +102.3 ppm, in .1ppm
© Copyright 2006 The Connor-Winfield Corp.
th
of the fill rate, where n
Data Sheet #: TM084
de-assert
De_Assert_Threshold (0x0d).
Bucket size must be greater than or equal to the
alarm assert threshold value, and the alarm assert
threshold value must be greater than the alarm de-
assert value.
Alarms appear in the Refs_Activity register (0x18/
19). A “1” indicates activity, and a “0” indicates an
alarm, no activity. Note that if a reference is active
and returns at a different autodetected frequency, it
will be become inactive immediately.
Ref
Reference inputs are also monitored and qualified for
frequency offset.
A PLL qualification range may be programmed up to
+/-102.3
Qualification_Range (0x12/13), and a disqualifica-
tion range set up to +/-102.3 ppm, by writing to regis-
ter
qualification range must be set less than the disquali-
fication range. Additionally, a qualification timer may
be programmed from 0 to 63 seconds by writing to
register Qualification_Timer (0x14). The PLL pull-in
range is the same as the disqualification range.
The actual frequency offset (relative to the calibrated
OCXO/TCXO) of any reference may be read by
selecting the reference in the Ref_Selector register
(0x15) and then reading the offset value in bits 7 - 0/
3 - 0 of register Ref_Frq_Offset (0x16/17).
Figure 3 shows the reference qualification scheme. A
reference is qualified if it has no activity alarm and is
within the qualification range for more than the quali-
fication time. An activity alarm or frequency offset
All Rights Reserved
Disqualification_Range
Frequency
1.544MHz
2.048MHz
19.44MHz
38.88MHz
77.76MHz
Page 10 of 44
Detector
64KHz
8KHz
Synchronous Clock for SETS
threshold
ppm
Figure 2: Activity Monitor
Specifications subject to change without notice
Monitor
Pulse
by
is
Rev: P02
writing
1mS ~ 16mS
Accumulator
Bucket size:
1/n
Leak Rate
n = 1 ~ 16
STC4130
written
Fill Rate
Bucket
Leaky
0 ~ 63
th
fill rate
Data Sheet
(0x10/11).
to
Date: 12/5/06
to
Threshold: 0 ~ 63
Threshold: 0 ~ 63
Alarm De-Assert
Alarm Assert
register
register
The