HYB25DC512800CF-5 QIMONDA [Qimonda AG], HYB25DC512800CF-5 Datasheet - Page 27

• Manufacturer Part Number: HYB25DC512800CF-5
• Description: 512-Mbit Double-Data-Rate SDRAM
• Manufacturer: QIMONDA [Qimonda AG]

Rev. 1.3, 2006-12
03292006-W2FE-ELDX
Parameter
Active Standby Current: one bank active; CS ≥ V
inputs changing twice per clock cycle; address and control inputs changing once per clock cycle
Operating Current: one bank active; Burst = 2; reads; continuous burst; address and control inputs changing
once per clock cycle; 50% of data outputs changing on every clock edge; CL = 2 for DDR200 and DDR266A,
CL = 3 for DDR333;
Operating Current: one bank active; Burst = 2; writes; continuous burst; address and control inputs changing
once per clock cycle; 50% of data outputs changing on every clock edge; CL = 2 for DDR200 and DDR266A,
CL = 3 for DDR333;
Auto-Refresh Current:
Self-Refresh Current: CKE ≤ 0.2 V; external clock on;
Operating Current: four bank; four bank interleaving with BL = 4; Refer to the following page for detailed test
conditions.
t
t
CK
CK
=
=
t
RC
t
t
CKMIN
CKMIN
=
t
RFCMIN
; I
OUT
, burst refresh
= 0 mA
IHMIN
; CKE ≥
t
CK
=
27
t
CKMIN
V
IHMIN
;
t
RC
=
t
RASMAX
;
t
CK
512-Mbit Double-Data-Rate SDRAM
=
t
CKMIN
HYB25DC512[800/160]C[E/F]
; DQ, DM and DQS
Internet Data Sheet
Symbol
I
I
I
I
I
I
DD3N
DD4R
DD4W
DD5
DD6
DD7