HYB18M1G160BF-6 QIMONDA [Qimonda AG], HYB18M1G160BF-6 Datasheet - Page 32

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HYB18M1G160BF-6

Manufacturer Part Number
HYB18M1G160BF-6
Description
1-Gbit x16 DDR Mobile-RAM
Manufacturer
QIMONDA [Qimonda AG]
Datasheet
Rev.1.0, 2007-03
10242006-Y557-TZXW
Parameter
DQ and DM input setup time
DQ and DM input hold time
DQ and DM input pulse width
Write command to 1st DQS latching transition
DQS input high-level width
DQS input low-level width
DQS falling edge to CK setup time
DQS falling edge hold time from CK
Write preamble setup time
Case 1:
tDQSS = min
Case 2:
tDQSS = max
DI n = Data In for column n
Burst Length = 4 in the case shown
3 subsequent elements of Data In are applied in the programmed order following DI n.
Although tDQSS is drawn only for the first DQS rising edge, each rising edge of DQS
must fall within the ± 25% window of the corresponding positive clock edge.
DQ, DM
DQ, DM
DQS
DQS
CK
CK
t
t
WPRES
WPRES
t
DQSS
t
WPRE
t
DS
t
DQSS
t
CK
t
WPRE
fast slew rate
slow slew rate
fast slew rate
slow slew rate
DI n
t
DS
t
DQSH
t
DH
DI n
t
CH
32
t
t
DQSH
t
DQSL
t
t
t
t
t
t
t
t
t
DSH
DS
DH
DIPW
DQSS
DQSH
DQSL
DSS
DSH
WPRES
Symbol
t
DH
t
CL
Basic WRITE Timing Parameters for DQs
Timing Parameters for WRITE Command
t
DQSL
0.6
TBD
0.6
TBD
2.1
0.75
0.4
0.4
0.2
0.2
0
min.
- 6
t
DSS
1.25
0.6
0.6
max.
t
WPST
t
DSH
0.75
0.85
0.75
0.85
1.7
0.75
0.4
0.4
0.2
0.2
0
min.
HY[B/E]18M1G16[0/1]BF
1-Gbit DDR Mobile-RAM
- 7.5
1.25
0.6
0.6
t
WPST
max.
FIGURE 23
= Don't Care
TABLE 12
t
DSS
t
Unit
ns
ns
ns
t
t
t
t
ns
CK
CK
CK
CK
CK
Data Sheet
Note
1)2)3)
1)2)4)
1)2)3)
1)2)4)
5)
6)

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