NAND04GA3C2A STMICROELECTRONICS [STMicroelectronics], NAND04GA3C2A Datasheet - Page 16

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NAND04GA3C2A

Manufacturer Part Number
NAND04GA3C2A
Description
4Gbit, 2112 Byte Page, 3V, Multi-level NAND Flash Memory
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
4 Bus operations
4.5
4.6
Table 5.
1. WP must be V
Table 6.
1. Any additional address input cycles will be ignored.
Table 7.
16/51
Bus Cycle
2
3
4
5
1
Command Input
Bus Operation
nd
st
rd
th
th
Address Input
Write Protect
Data Output
Data Input
Standby
Write Protect
Write Protect bus operations are used to protect the memory against program or erase
operations. When the Write Protect signal is Low the device will not accept program or erase
operations and so the contents of the memory array cannot be altered. The Write Protect
signal is not latched by Write Enable to ensure protection even during power-up.
Standby
The memory enters Standby mode by driving Chip Enable, E, High. In standby mode, the
device is deselected, outputs are disabled and power consumption is reduced.
Bus Operations
Address insertion
Address Definitions
A12 - A18
A19 - A29
Address
A0 - A11
IH
I/O7
A19
A27
V
V
A7
when issuing a Program or Erase command.
IL
IL
I/O6
A18
A26
V
V
A6
V
V
V
V
V
IL
IL
E
X
IH
IL
IL
IL
IL
(1)
V
AL
V
V
V
I/O5
A17
A25
V
V
X
X
A5
IH
IL
IL
IL
IL
IL
V
CL
V
V
V
X
X
IH
IL
IL
IL
I/O4
A16
A24
V
V
A4
IL
IL
Falling
V
V
V
R
X
X
IH
IH
IH
I/O3
A11
A15
A23
V
A3
Column Address
IL
Block Address
Page Address
Definition
Rising
Rising
Rising
NAND04GA3C2A, NAND04GW3C2A
V
W
X
X
IH
I/O2
A10
A14
A22
V
A2
IL
V
IL
WP
X
V
V
/V
X
X
(1)
IH
IL
DD
I/O1
A13
A21
A29
A1
A9
Data Output
I/O0 - I/O7
Command
Data Input
Address
X
X
I/O0
A12
A20
A28
A0
A8

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