HD6417606 RENESAS [Renesas Technology Corp], HD6417606 Datasheet - Page 336

• Manufacturer Part Number: HD6417606
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 13 Host Interface (HIF)
13.4.4
HIFMCR is a 32-bit register used to control HIFRAM. HIFMCR can be only read by the on-chip
CPU. Access to HIFMCR by an external device should be performed with HIFMCR specified by
bits REG5 to REG0 in HIFIDX and the HIFRS pin low.
Rev. 4.00 Sep. 13, 2007 Page 310 of 502
REJ09B0239-0400
Bit
5
4 to 2
1
0
Bit
31 to 8 —
Bit Name
HIF Memory Control Register (HIFMCR)
Bit Name
MD1
—
EDN
BO
Initial
Value
All 0
Initial
Value
0/1
All 0
0
0
R/W
R
R/W
R
R
R/W
R/W
Description
Reserved
These bits are always read as 0. The write value should
always be 0.
Reserved
These bits are always read as 0. The write value
should always be 0.
Endian for HIFRAM Access
Specifies the byte order when HIFRAM is accessed
by the on-chip CPU.
0: Big endian (MSB first)
1: Little endian (LSB first)
Byte Order for Access of All HIF Registers Including
HIFDATA
Specifies the byte order when an external device
accesses all HIF registers including HIFDATA.
0: Big endian (MSB first)
1: Little endian (LSB first)
Description
HIF Mode 1
Indicates whether this LSI was started up in HIF boot
mode or non-HIF boot mode. This bit stores the value
of the HIFMD pin sampled at a power-on reset
0: Started up in non-HIF boot mode (booted from the
1: Started up in HIF boot mode (booted from
memory connected to area 0)
HIFRAM)