HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 612

• Manufacturer Part Number: HD6417144
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

16. Compare Match Timer (CMT)
16.5.3
If an increment occurs during the T2 state of the CMCNT byte write cycle, the counter write has
priority, so no increment of the write data results on the side on which the write was performed.
The byte data on the side on which writing was not performed is also not incremented, so the
contents are those before the write.
Figure 16.8 shows the timing when an increment occurs during the T2 state of the CMCNT
(Upper byte) write cycle.
Rev.4.00 Mar. 27, 2008 Page 568 of 882
REJ09B0108-0400
Contention between CMCNT Byte Write and Counter Incrementation
Figure 16.8 CMCNT Byte Write and Increment Contention
Address
Internal write
signal
CMCNT input
clock
CMCNT
(Upper byte)
CMCNT
(Lower byte)
Pφ
N
X
CMCNT write cycle
CMCNT (Upper byte)
T1
T2
M
X
CMCNT write data