HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 183
HD6417144
Manufacturer Part Number
HD6417144
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417144.pdf
(930 pages)
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9.2
Table 9.1 shows the bus state controller pin configuration.
Table 9.1
Note:
Name
Address bus
Data bus
Chip select
Read
Write
Wait
Bus request
Bus acknowledge
*
Input/Output Pins
Pins CS4 to CS7 are available only for the masked ROM version and ROMless version.
Pin Configuration
Abbr.
A21 to A0
D31 to D0
CS0 to CS7* Output Chip select signal indicating the area being
RD
WRHH
WRHL
WRH
WRL
WAIT
BREQ
BACK
I/O
Output Address output (Address bus A21 to A18 pins are
I/O
Output Strobe that indicates the read cycle
Output Strobe that indicates a write cycle to the first byte
Output Strobe that indicates a write cycle to the second
Output Strobe that indicates a write cycle to the third byte
Output Strobe that indicates a write cycle to the fourth byte
Input
Input
Output Bus use enable output
Description
disabled and I/O port function is enabled after
power-on-reset.)
32-bit data bus
accessed
(D31 to D24)
byte (D23 to D16)
(D15 to D8)
(D7 to D0)
Wait state request signal
Bus request input
Rev.4.00 Mar. 27, 2008 Page 139 of 882
9. Bus State Controller (BSC)
REJ09B0108-0400
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