HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 180

• Manufacturer Part Number: HD6417144
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

8. Data Transfer Controller (DTC)
8.5
8.5.1
DMAC and DTC register access by the DMAC is prohibited.
8.5.2
DTC operation can be disabled or enabled using the module standby control register. The initial
setting is for DTC operation to be halted. Register access is enabled by clearing module standby
mode.
When the MSTP24 and MSTP25 bits in MSTCR1 are set to 1, the DTC clock is halted and the
DTC enters module standby mode. The MSTP24 and MSTP25 bit cannot be set to 1 during
activation of the DTC.
In addition, when the module standby mode is entered, clear all the DTER bits to 0.
For details, refer to section 24, Power-Down Modes.
8.5.3
The DTMR, DTSAR, DTDAR, DTCRA,DTCRB and DTIAR registers are all located in on-chip
RAM. When the DTC is used, the RAME bit in SYSCR must not be cleared to 0.
Rev.4.00 Mar. 27, 2008 Page 136 of 882
REJ09B0108-0400
Usage Notes
Prohibition against DMAC/DTC Register Access by DTC
Module Standby Mode Setting
On-Chip RAM