HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 238
HD6417144
Manufacturer Part Number
HD6417144
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417144.pdf
(930 pages)
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10. Direct Memory Access Controller (DMAC)
Rev.4.00 Mar. 27, 2008 Page 194 of 882
REJ09B0108-0400
Figure 10.10 shows an example of timing in indirect address mode when transfer source and
indirect address storage locations are in internal memory, the transfer destination is an on-chip
peripheral module with 2-cycle access space, and transfer data is 8-bit.
Since the indirect address storage destination and the transfer source are in internal memory,
these can be accessed in one cycle. The transfer destination is 2-cycle access space, so two data
write cycles are required. One NOP cycle is required until the data read as the indirect address
is output to the address bus.
Figure 10.10 Dual Address Mode and Indirect Address Transfer Timing Example
address
address
indirect
Internal
Internal
DMAC
DMAC
buffer
buffer
data
data
bus
bus
CK
Transfer
address
source
(On-chip Memory Space to On-chip Memory Space)
read cycle
Address
Indirect
address
(1st)
NOP
Indirect
address
address
Indirect
(2nd)
cycle
NOP
NOP
read cycle
destination
Transfer
address
Transfer
(3rd)
Data
data
Data write cycle (4th)
Transfer data
Transfer data
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