HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 294

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HD6417144

Manufacturer Part Number
HD6417144
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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11.
11.3.8
TSTR is an 8-bit readable/writable register that selects operation/stoppage for channels 0 to 4.
When setting the operating mode in TMDR or setting the count clock in TCR, first stop the TCNT
counter.
11.3.9
TSYR is an 8-bit readable/writable register that selects independent operation or synchronous
operation for the channel 0 to 4 TCNT counters. A channel performs synchronous operation when
the corresponding bit in TSYR is set to 1.
Rev.4.00 Mar. 27, 2008 Page 250 of 882
REJ09B0108-0400
Bit
7
6
5 to 3 —
2
1
0
Multi-Function Timer Pulse Unit (MTU)
Bit Name
CST4
CST3
CST2
CST1
CST0
Timer Start Register (TSTR)
Timer Synchronous Register (TSYR)
All 0
Initial Value
0
0
0
0
0
R/W
R/W
R/W
R
R/W
R/W
R/W
Description
Counter Start 4 and 3
These bits select operation or stoppage for TCNT.
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but
the TIOC pin output compare output level is retained.
If TIOR is written to when the CST bit is cleared to 0,
the pin output level will be changed to the set initial
output value.
0: TCNT_4 and TCNT_3 count operation is stopped
1: TCNT_4 and TCNT_3 performs count operation
Reserved
These bits are always read as 0. The write value
should always be 0.
Counter Start 2 to 0
These bits select operation or stoppage for TCNT.
If 0 is written to the CST bit during operation with the
TIOC pin designated for output, the counter stops but
the TIOC pin output compare output level is retained.
If TIOR is written to when the CST bit is cleared to 0,
the pin output level will be changed to the set initial
output value.
0: TCNT_2 to TCNT_0 count operation is stopped
1: TCNT_2 to TCNT_0 performs count operation

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