XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 70
XIO2000AI
Manufacturer Part Number
XIO2000AI
Description
PCI Express to PCI Bus Translation Bridge
Manufacturer
TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]
Datasheet
1.XIO2000AI.pdf
(159 pages)
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Classic PCI Configuration Space
4.24 I/O Base Upper 16-Bit Register
4.25 I/O Limit Upper 16-Bit Register
4.26 Capabilities Pointer Register
60
15:0
15:0
BIT
BIT
SCPS155C
This read/write register specifies the upper 16 bits of the I/O base register. See Table 4−15 for a complete
description of the register contents.
This read/write register specifies the upper 16 bits of the I/O limit register. See Table 4−16 for a complete
description of the register contents.
This read-only register provides a pointer into the PCI configuration header where the PCI power management
block resides. Since the PCI power management registers begin at 50h, this register is hardwired to 50h.
RESET STATE
RESET STATE
RESET STATE
BIT NUMBER
BIT NUMBER
BIT NUMBER
FIELD NAME
FIELD NAME
PCI register offset:
Register type:
Default value:
PCI register offset:
Register type:
Default value:
PCI register offset:
Register type:
Default value:
IOBASE
IOLIMIT
ACCESS
ACCESS
15
15
0
0
7
0
RW
RW
Table 4−15. I/O Base Upper 16-Bit Register Description
Table 4−16. I/O Limit Upper 16-Bit Register Description
14
14
0
0
6
1
I/O base upper 16 bits. Defines the upper 16 bits of the lowest address of the I/O address range
that determines when to forward I/O transactions downstream. These bits correspond to address
bits [31:20] in the I/O address. The lower 20 bits are assumed to be 00000h.
I/O limit upper 16 bits. Defines the upper 16 bits of the top address of the I/O address range that
determines when to forward I/O transactions downstream. These bits correspond to address
bits [31:20] in the I/O address. The lower 20 bits are assumed to be FFFFFh.
13
13
0
0
5
0
30h
Read/Write
0000h
32h
Read/Write
0000h
34h
Read-only
50h
12
12
0
0
4
1
11
11
0
0
3
0
10
10
0
0
2
0
9
0
9
0
1
0
8
0
8
0
DESCRIPTION
DESCRIPTION
0
0
7
0
7
0
6
0
6
0
5
0
5
0
April 2007 Revised October 2008
4
0
4
0
3
0
3
0
2
0
2
0
1
0
1
0
0
0
0
0
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