XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 13
XIO2000AI
Manufacturer Part Number
XIO2000AI
Description
PCI Express to PCI Bus Translation Bridge
Manufacturer
TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]
Datasheet
1.XIO2000AI.pdf
(159 pages)
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2.4
2.5
2.6
April 2007 Revised October 2008
REVISION
05/2004
08/2005
DATE
ORDERING NUMBER
Document Conventions
Throughout this data manual, several conventions are used to convey information. These conventions are
listed below:
1. To identify a binary number or field, a lower case b follows the numbers. For example: 000b is a 3-bit binary
2. To identify a hexadecimal number or field, a lower case h follows the numbers. For example: 8AFh is a
3. All other numbers that appear in this document that do not have either a b or h following the number are
4. If the signal or terminal name has a bar above the name (for example, GRST), then this indicates the
5. Differential signal names end with P, N, +, or − designators. The P or + designators signify the positive
6. RSVD indicates that the referenced item is reserved.
7. The power and ground signals in Figure 2−1 are not subscripted to aid in readability.
8. In Sections 4 through 6, the configuration space for the bridge is defined. For each register bit, the software
Document History
Ordering Information
XIO2000AI
XIO2000AI
XIO2000AI
XIO2000A
XIO2000A
XIO2000A
XIO2000A
field.
12-bit hexadecimal field.
assumed to be decimal format.
logical NOT function. When asserted, this signal is a logic low, 0, or 0b.
signal associated with the differential pair. The N or − designators signify the negative signal associated
with the differential pair.
access method is identified in an access column. The legend for this access column includes the following
entries:
REVISION
NUMBER
r – read access by software
u – updates by the bridge internal hardware
w – write access by software
c – clear an asserted status bit with a write-back of 1b by software
A
−
Product preview
Initial release
PCI-Express to PCI Bridge
PCI-Express to PCI Bridge
PCI-Express to PCI Bridge
PCI-Express to PCI Bridge
PCI-Express to PCI Bridge
PCI-Express to PCI Bridge
PCI-Express to PCI Bridge
NAME
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V, 5.0-V tolerant PCI bus I/Os with
3.3-V and 1.5-V power terminals
3.3-V and 1.5-V power terminals
3.3-V and 1.5-V power terminals
3.3-V and 1.5-V power terminals
3.3-V and 1.5-V power terminals
3.3-V and 1.5-V power terminals
3.3-V and 1.5-V power terminals
REVISION COMMENTS
VOLTAGE
175-terminal ZHH (Lead-Free)
175-terminal ZHC (Lead-Free)
175-terminal ZHH (Lead-Free)
175-terminal ZHC (Lead-Free)
201-terminal ZZZ (Lead-Free)
201-terminal ZZZ (Lead-Free)
201-terminal GZZ MicroStar
MicroStar PBGA
MicroStar PBGA
MicroStar PBGA
MicroStar PBGA
MicroStar PBGA
MicroStar PBGA
PACKAGE
SCPS155C
PBGA
Introduction
3
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