XIO2000AI TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS], XIO2000AI Datasheet - Page 47
XIO2000AI
Manufacturer Part Number
XIO2000AI
Description
PCI Express to PCI Bus Translation Bridge
Manufacturer
TAOS [TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS]
Datasheet
1.XIO2000AI.pdf
(159 pages)
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3.6
April 2007 Revised October 2008
Isoc Ref
Clock
Port Arb
Table
31
PCI Bus
Bridge
Bridge
REQ0
REQ1
REQ2
GNT0
GNT1
GNT2
REQ
GNT
Configuration Register Translation
PCI Express configuration register transactions received by the bridge are decoded based on the transaction’s
destination ID. These configuration transactions can be broken into three subcategories: type 0 transactions,
type 1 transactions that target the secondary bus, and type 1 transactions that target a downstream bus other
than the secondary bus.
PCI Express type 0 configuration register transactions always target the configuration space and are never
passed on to the secondary interface.
Type 1 configuration register transactions that target a device on the secondary bus are converted to type 0
configuration register transactions on the PCI bus. Figure 3−6 shows the address phase of a type 0
configuration transaction on the PCI bus as defined by the PCI specification.
3
3
Figure 3−6. Type 0 Configuration Transaction Address Phase Encoding
0
Bridge
0
IDSEL
0
2
2
Device 1 ‡
2
Figure 3−5. PCI Bus Timing
2
1
16
Device 0
1
15
1
Reserved
1
3
Device 2
11
3
10
Function
Number
3
0
8
Bridge
0
7
Feature/Protocol Descriptions
Register Number
0
2
Device 1
SCPS155C
2
2
2
2
1
0
1
0
0
37
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