MFRC52201HN1/TRAYB NXP [NXP Semiconductors], MFRC52201HN1/TRAYB Datasheet - Page 37

• Manufacturer Part Number: MFRC52201HN1/TRAYB
• Description: Contactless reader IC
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
MFRC522_33
Product data sheet
PUBLIC
9.3.1.4 DivIEnReg register
9.3.1.5 ComIrqReg register
Table 26.
Control bits to enable and disable the passing of interrupt requests.
Table 27.
Table 28.
Interrupt request bits.
Table 29.
Bit Symbol
7
6
5
4
3
2
1
0
Bit
7
6 to 5 reserved
4
3
2
1 to 0 reserved
Bit
Symbol
Access
Bit
Symbol
Access
IRqInv
TxIEn
RxIEn
IdleIEn
HiAlertIEn -
LoAlertIEn -
ErrIEn
TimerIEn
Symbol
IRQPushPull
MfinActIEn
reserved
CRCIEn
ComIEnReg register bit descriptions
DivIEnReg register (address 03h); reset value: 00h bit allocation
DivIEnReg register bit descriptions
ComIrqReg register (address 04h); reset value: 14h bit allocation
Set1
W
7
IRQPushPull
Value Description
1
0
-
-
-
-
-
R/W
TxIRq
7
D
6
Value Description
1
0
-
-
-
-
-
Rev. 3 — 26 October 2009
signal on pin IRQ is inverted with respect to the Status1Reg register’s IRq
bit
signal on pin IRQ is equal to the IRq bit; in combination with the
DivIEnReg register’s IRqPushPull bit, the default value of logic 1 ensures
that the output level on pin IRQ is 3-state
allows the transmitter interrupt request (TxIRq bit) to be propagated to pin
IRQ
allows the receiver interrupt request (RxIRq bit) to be propagated to pin
IRQ
allows the idle interrupt request (IdleIRq bit) to be propagated to pin IRQ
allows the high alert interrupt request (HiAlertIRq bit) to be propagated to
pin IRQ
allows the low alert interrupt request (LoAlertIRq bit) to be propagated to
pin IRQ
allows the error interrupt request (ErrIRq bit) to be propagated to pin IRQ
allows the timer interrupt request (TimerIRq bit) to be propagated to pin
IRQ
RxIRq
pin IRQ is a standard CMOS output pin
pin IRQ is an open-drain output pin
reserved for future use
allows the MFIN active interrupt request to be propagated to
pin IRQ
reserved for future use
allows the CRC interrupt request, indicated by the DivIrqReg
register’s CRCIRq bit, to be propagated to pin IRQ
reserved for future use
reserved
D
5
6
112133
-
5
IdleIRq
D
4
MfinActIEn
R/W
4
HiAlertIRq
D
3
reserved
3
-
LoAlertIRq
D
2
Contactless reader IC
CRCIEn
MFRC522
R/W
2
ErrIRq
© NXP B.V. 2009. All rights reserved.
D
1
reserved
TimerIRq
1
37 of 96
D
-
0
0