MFRC52201HN1/TRAYB NXP [NXP Semiconductors], MFRC52201HN1/TRAYB Datasheet - Page 17

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MFRC52201HN1/TRAYB

Manufacturer Part Number
MFRC52201HN1/TRAYB
Description
Contactless reader IC
Manufacturer
NXP [NXP Semiconductors]
Datasheet
NXP Semiconductors
MFRC522_33
Product data sheet
PUBLIC
Fig 15. Data transfer on the I
SDA
SCL
repeated START
START or
condition
8.1.4.4 Acknowledge
Sr
or
S
MSB
An acknowledge must be sent at the end of one data byte. The acknowledge-related clock
pulse is generated by the master. The transmitter of data, either master or slave, releases
the SDA line (HIGH) during the acknowledge clock pulse. The receiver pulls down the
SDA line during the acknowledge clock pulse so that it remains stable LOW during the
HIGH period of this clock pulse.
The master can then generate either a STOP (P) condition to stop the transfer or a
repeated START (Sr) condition to start a new transfer.
A master-receiver indicates the end of data to the slave-transmitter by not generating an
acknowledge on the last byte that was clocked out by the slave. The slave-transmitter
releases the data line to allow the master to generate a STOP (P) or repeated START (Sr)
condition.
1
Fig 14. Acknowledge on the I
2
by transmitter
2
C-bus
data output
by receiver
data output
SCL from
master
7
condition
START
Rev. 3 — 26 October 2009
S
8
acknowledgement
signal from slave
interrupt within slave
byte complete,
ACK
9
112133
2
C-bus
1
clock line held LOW while
interrupts are serviced
1
2
2
3 - 8
not acknowledge
signal from receiver
acknowledgement
acknowledge
ACK
8
9
Contactless reader IC
acknowledgement
MFRC522
clock pulse for
repeated START
© NXP B.V. 2009. All rights reserved.
condition
STOP or
9
Sr
or
P
Sr
P
msc608
mbc602
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