PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 87

• Manufacturer Part Number: PIC18F258
• Description: High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
• Manufacturer: MICROCHIP [Microchip Technology]

8.3
The Peripheral Interrupt Enable (PIE) registers contain
the individual enable bits for the peripheral interrupts
(Register 8-7 through Register 8-9). Due to the number
of peripheral interrupt sources, there are three Periph-
eral Interrupt Enable registers (PIE1, PIE2, PIE3).
When IPEN is clear, the PEIE bit must be set to enable
any of these peripheral interrupts.
REGISTER 8-7:
 2002 Microchip Technology Inc
PIE Registers
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
PERIPHERAL INTERRUPT ENABLE REGISTER 1 (PIE1)
PSPIE: Parallel Slave Port Read/Write Interrupt Enable bit
1 = Enables the PSP read/write interrupt
0 = Disables the PSP read/write interrupt
ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D interrupt
0 = Disables the A/D interrupt
RCIE: USART Receive Interrupt Enable bit
1 = Enables the USART receive interrupt
0 = Disables the USART receive interrupt
TXIE: USART Transmit Interrupt Enable bit
1 = Enables the USART transmit interrupt
0 = Disables the USART transmit interrupt
SSPIE: Master Synchronous Serial Port Interrupt Enable bit
1 = Enables the MSSP interrupt
0 = Disables the MSSP interrupt
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
Note 1: This bit is only available on PIC18F4X8 devices. For PIC18F2X8 devices, this bit
bit 7
Legend:
R = Readable bit
- n = Value at POR
PSPIE
R/W-0
(1)
is unimplemented and reads as ’0’.
R/W-0
ADIE
R/W-0
RCIE
Preliminary
W = Writable bit
’1’ = Bit is set
R/W-0
TXIE
SSPIE
R/W-0
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
(1)
CCP1IE
R/W-0
PIC18FXX8
x = Bit is unknown
TMR2IE
R/W-0
DS41159B-page 85
TMR1IE
R/W-0
bit 0