PIC18F258 MICROCHIP [Microchip Technology], PIC18F258 Datasheet - Page 141
PIC18F258
Manufacturer Part Number
PIC18F258
Description
High Performance, 28/40-Pin Enhanced FLASH Microcontrollers with CAN
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
1.PIC18F258.pdf
(384 pages)
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16.5.8
The following steps should be taken when configuring
the ECCP1 module for PWM operation:
1.
TABLE 16-5:
2002 Microchip Technology Inc.
INTCON
RCON
IPR2
PIR2
PIE2
TMR2
PR2
T2CON
TRISD
ECCPR1H
ECCPR1L
ECCP1CON EPWM1M1 EPWM1M0
ECCPAS
ECCP1DEL
Legend:
Name
Configure the PWM module:
a)
b)
c)
d)
e)
Disable the ECCP1/P1A, P1B, P1C and/or
P1D outputs by setting the respective TRISD
bits.
Set the PWM period by loading the PR2
register.
Set the PWM duty cycle by loading the
ECCPR1L register and ECCP1CON<5:4> bits.
Configure the ECCP1 module for the desired
PWM operation, by loading the ECCP1CON
register with the appropriate value. With the
ECCP1M<3:0> bits, select the active high/low
levels for each PWM output. With the
EPWM1M<1:0> bits, select one of the
available Output modes.
For Half-Bridge Output mode, set the dead-
band delay by loading the ECCP1DEL
register with the appropriate value.
x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used by the ECCP module.
SETUP FOR PWM OPERATION
Timer2 Module Register
Timer2 Module Period Register
PORTD Data Direction Register
Enhanced Capture/Compare/PWM Register1 High Byte
Enhanced Capture/Compare/PWM Register1 Low Byte
ECCPASE ECCPAS2
GIE/GIEH PEIE/GIEL
EPDC7
IPEN
Bit 7
—
—
—
—
REGISTERS ASSOCIATED WITH ENHANCED PWM AND TIMER2
TOUTPS3
EPDC6
CMIP
CMIE
CMIF
Bit 6
—
ECCPAS1 ECCPAS0 PSSAC1
TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000
EDC1B1
TMR0IE
EPDC5
Bit 5
—
—
—
—
EDC1B0
EPDC4
INT0IE
EEIP
EEIE
Bit 4
EEIF
RI
Preliminary
ECCP1M3 ECCP1M2 ECCP1M1 ECCP1M0 0000 0000 0000 0000
EPDC3
BCLIP
BCLIE
BCLIF
RBIE
Bit 3
TO
2.
3.
PSSAC0
TMR0IF
Configure and start TMR2:
a)
b)
c)
Enable PWM outputs after a new cycle has
started:
a)
b)
EPDC2
LVDIP
LVDIF
LVDIE
Bit 2
PD
Clear the TMR2 interrupt flag bit by clearing
the TMR2IF bit in the PIR1 register.
Set the TMR2 prescale value by loading the
T2CKPS bits (T2CON<1:0>).
Enable Timer2 by setting the TMR2ON bit
(T2CON<2>) register.
Wait until TMR2 overflows (TMR2IF bit
becomes a ’1’). The new PWM cycle begins
here.
Enable the ECCP1/P1A, P1B, P1C and/or
P1D pin outputs by clearing the respective
TRISD bits.
PSSBD1
TMR3IP
TMR3IE
TMR3IF
EPDC1
INT0IF
Bit 1
POR
ECCP1IP -0-0 1111 -1-1 1111
ECCP1IE -0-0 0000 -0-0 0000
ECCP1IF -0-0 0000 -0-0 0000
PSSBD0 0000 0000 0000 0000
EPDC0
PIC18FXX8
Bit 0
RBIF
BOR
0000 000x 0000 000u
0--1 11qq 0--q qquu
0000 0000 0000 0000
1111 1111 1111 1111
1111 1111 1111 1111
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
0000 0000 uuuu uuuu
POR, BOR
Value on
DS41159B-page 139
Value on
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