PIC17C752-08/CL MICROCHIP [Microchip Technology], PIC17C752-08/CL Datasheet - Page 60

• Manufacturer Part Number: PIC17C752-08/CL
• Description: High-Performance 8-Bit CMOS EPROM Microcontrollers with 10-bit A/D
• Manufacturer: MICROCHIP [Microchip Technology]

PIC17C7XX
8.2
Table writes to external memory are always two-cycle
instructions. The second cycle writes the data to the
external memory location. The sequence of events for
an external memory write are the same for an internal
write.
FIGURE 8-5:
DS30289A-page 60
Note:
Note:
Table Writes to External Memory
If external write, and GLINTD = '1', and Enable bit = '1', then when '1'
The highest pending interrupt is cleared.
If an interrupt is pending or occurs during
the TABLWT, the two cycle table write
completes. The RA0/INT, TMR0, or
T0CKI interrupt flag is automatically
cleared or the pending peripheral inter-
rupt is acknowledged.
AD15:AD0
Instruction
executed
TABLWT WRITE TIMING (EXTERNAL MEMORY)
Instruction
fetched
ALE
WR
OE
Q1 Q2 Q3 Q4
'1'
INST (PC-1)
TABLWT
PC
Q1 Q2 Q3 Q4
TABLWT cycle1
INST (PC+1)
PC+1
8.2.2
The “i” operand of the TABLWT instruction can specify
that the value in the 16-bit TBLPTR register is auto-
matically
Example
incremented.
EXAMPLE 8-1:
CLRWDT
MOVLW
MOVWF
MOVLW
MOVWF
MOVLW
TLWT
MOVLW
TABLWT
Data write cycle
Q1 Q2 Q3 Q4
TABLWT cycle2
TBL
TABLE WRITE CODE
8-1, the TBLPTR register is not automatically
Flag bit, Do table write.
incremented
HIGH (TBL_ADDR) ; Load the Table
TBLPTRH
LOW (TBL_ADDR)
TBLPTRL
HIGH (DATA)
1, WREG
LOW (DATA)
0,0,WREG
Data out
TABLE WRITE
Q1 Q2 Q3 Q4
INST (PC+2)
INST (PC+1)
1998 Microchip Technology Inc.
(for
PC+2
the
; Clear WDT
;
;
;
; Load HI byte
;
; Load LO byte
;
;
;
;
address
in TABLATH
in TABLATL
and write to
program memory
(Ext. SRAM)
next
write). In