PIC17C752-08/CL MICROCHIP [Microchip Technology], PIC17C752-08/CL Datasheet - Page 294

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PIC17C752-08/CL

Manufacturer Part Number
PIC17C752-08/CL
Description
High-Performance 8-Bit CMOS EPROM Microcontrollers with 10-bit A/D
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet
PIC17C7XX
FIGURE F-4:
DS30289A-page 294
bit7
bit 7-6: Unimplemented: Read as '0'
bit 5:
bit 4:
bit 3:
bit 2:
bit 1:
bit 0:
U - 0
STKAV: Stack Available bit
This bit indicates that the 4-bit stack pointer value is Fh, or has rolled over from Fh
1 = Stack is available
0 = Stack is full, or a stack overflow may have occurred
GLINTD: Global Interrupt Disable bit
This bit disables all interrupts. When enabling interrupts, only the sources with their enable bits set can
cause an interrupt.
1 = Disable all interrupts
0 = Enables all un-masked interrupts
TO: WDT Time-out Status bit
1 = After power-up or by a CLRWDT instruction
0 = A Watchdog Timer time-out occurred
PD: Power-down Status bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set by software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
When BODEN configuration bit is set (enabled):
1 = No Brown-out Reset occurred
0 = A Brown-out Reset occurred (must be set by software)
When BODEN configuration bit is clear (disabled):
Don’t care
U - 0
(Once this bit has been cleared by a stack overflow, only a device reset will set this bit)
CPUSTA REGISTER (ADDRESS: 06h, UNBANKED)
STKAV GLINTD
R - 1
R/W - 1
R - 1
TO
R - 1
PD
R/W - 0
POR
R/W - 1
BOR
bit0
R = Readable bit
W = Writable bit
U = Unimplemented bit,
- n = Value at POR reset
1998 Microchip Technology Inc.
Read as ‘0’
0h (stack overflow).

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