SL811HS_07 CYPRESS [Cypress Semiconductor], SL811HS_07 Datasheet - Page 28

• Manufacturer Part Number: SL811HS_07
• Description: Embedded USB Host/Slave Controller
• Manufacturer: CYPRESS [Cypress Semiconductor]

Document 38-08008 Rev. *D
DMA Write Cycle
Note nWR must go low after nDACK goes low in order for nDRQ to clear. If this sequence is not implemented as requested, the
next nDRQ is not inserted.
tdack
tdwrlo
tdakrq
tdwrp
tdhld
tdsu
tackrq
tackwrh
twrcycle
Parameter
nD A C K
n D R Q
D 0-D 7
n W R
nDACK low
nDACK to nWR low delay
nDACK low to nDRQ high delay
nWR pulse width
Data hold after nWR high
Data set-up to nWR strobe low
NDACK high to nDRQ low
NDACK high to nDRQ low
DMA Write Cycle Time
Description
SL811 D M A W R IT E C Y C LE TIM IN G
tdsu
DMA Write Cycle
tdakrq
150 ns
tdw rlo
80 ns
65 ns
60 ns
Min.
5 ns
5 ns
5 ns
5 ns
5 ns
tdack
tdw rp
D AT A
tackrq
Typ.
tdhld
tackw rh
SL811HS
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