SL811HS_07 CYPRESS [Cypress Semiconductor], SL811HS_07 Datasheet - Page 26
SL811HS_07
Manufacturer Part Number
SL811HS_07
Description
Embedded USB Host/Slave Controller
Manufacturer
CYPRESS [Cypress Semiconductor]
Datasheet
1.SL811HS_07.pdf
(32 pages)
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Document 38-08008 Rev. *D
Bus Interface Timing Requirements
I/O Write Cycle
Note nCS an be held LOW for multiple Write cycles provided nWR is cycled. Write Cycle Time for Auto Inc Mode Writes is 170
ns minimum.
t
t
t
t
t
t
t
t
t
WR
WCSU
WSHLD
WASU
WAHLD
WDSU
WDHLD
CSCS
WRHIGH
Parameter
nWR
A0
D0-D7
nCS
Write pulse width
Chip select set-up to nWR LOW
Chip select hold time
After nWR HIGH
A0 address set-up time
A0 address hold time
Data to Write HIGH set-up time
Data hold time after Write HIGH
nCS inactive to nCS* asserted
NWR HIGH
twcsu
twasu
twdsu
I/O Write Cycle to Register or Memory Buffer
Description
twr
Register or Memory
Address
twshld
twahld
twdhld
85 ns
85 ns
10 ns
85 ns
85 ns
85 ns
Min.
0 ns
0 ns
5 ns
Tcscs See Note.
DATA
twdsu
twrhigh
Typ.
twdhld
SL811HS
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