CY7C1480BV33_11 CYPRESS [Cypress Semiconductor], CY7C1480BV33_11 Datasheet - Page 12

• Manufacturer Part Number: CY7C1480BV33_11
• Description: 72-Mbit (2 M x 36/4 M x 18/1 M x 72) Pipelined Sync SRAM
• Manufacturer: CYPRESS [Cypress Semiconductor]

Truth Table for Read/Write
The read/write truth table for CY7C1480BV33 follows.
Truth Table for Read/Write
The read/write truth table for CY7C1482BV33 follows.
Truth Table for Read/Write
The read/write truth table for CY7C1486BV33 follows.
Document Number: 001-15145 Rev. *F
Read
Read
Write byte A – (DQ
Write byte B – (DQ
Write bytes B, A
Write byte C – (DQ
Write bytes C, A
Write bytes C, B
Write bytes C, B, A
Write byte D – (DQ
Write bytes D, A
Write bytes D, B
Write bytes D, B, A
Write bytes D, C
Write bytes D, C, A
Write bytes D, C, B
Write all bytes
Write all bytes
Read
Read
Write byte A – (DQ
Write byte B – (DQ
Write bytes B, A
Write all bytes
Write all bytes
Read
Read
Write byte x – (DQ
Write all bytes
Write all bytes
Note
7. BWx represents any byte write signal BW[0..7].To enable any byte write BWx, a Logic LOW signal must be applied at clock rise. Any number of bye writes can be
enabled at the same time for any write.
Function (CY7C1480BV33)
Function (CY7C1482BV33)
Function (CY7C1486BV33)
x
B
C
D
B
A
A
and DQP
and DQP
and DQP
and DQP
and DQP
and DQP
and DQP
x
B
D
)
A
C
A
B
)
)
)
)
)
)
CY7C1480BV33, CY7C1482BV33, CY7C1486BV33
GW
GW
GW
[7]
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
[7]
H
H
H
H
H
H
[7]
H
H
H
H
L
L
L
BWE
BWE
BWE
H
X
H
X
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
All BW = H
All BW = L
BW
BW
BW
X
H
H
H
H
H
H
H
H
X
X
H
H
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
B
D
X
BW
BW
H
H
X
H
H
H
H
H
H
H
H
X
X
L
L
X
L
L
L
L
L
L
L
L
L
C
A
BW
X
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
B
Page 12 of 36
BW
X
H
H
H
H
H
H
H
H
X
L
L
L
L
L
L
L
L
A
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