MT42C4256C-10/883C AUSTIN [Austin Semiconductor], MT42C4256C-10/883C Datasheet - Page 13

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MT42C4256C-10/883C

Manufacturer Part Number
MT42C4256C-10/883C
Description
256K X 4 VRAM 256K x 4 DRAM with 512K x 4 SAM
Manufacturer
AUSTIN [Austin Semiconductor]
Datasheet

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NORMAL-READ TRANSFER
(refer to Figure 7)
address bits (A0– A8) are latched at the falling edge of CAS\ to
select one of the SAM’s 512 available tap points where the
serial data is read out.
FIGURE 6: NORMAL-WRITE-TRANSFER-CYCLE TIMING
FIGURE 7: NORMAL-READ-TRANSFER TIMINGS
SMJ44C251B/MT42C4256
Rev. 0.1 12/03
Austin Semiconductor, Inc.
13
early-load read transfer, real-time or midline-load read transfer,
and late-load read transfer. Each of these offers the flexibility of
controlling the TRG\ trailing edge in the read-transfer cycle
(see Figure 7).
A normal-read transfer can be performed in three ways:
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
SMJ44C251B
MT42C4256
VRAM
VRAM
VRAM
VRAM
VRAM

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