MC68HC58 Motorola, MC68HC58 Datasheet - Page 9

• Manufacturer Part Number: MC68HC58
• Description: Data Link Controller
• Manufacturer: Motorola

Figure
1-1
1-2
2-1
2-2
2-3
2-4
2-5
2-6
3-1
3-2
3-3
3-4
3-5
3-6
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10
4-11
4-12
A-1
A-2
A-3
A-4
A-5
A-6
B-1
B-2
B-3
B-4
MC68HC58
TECHNICAL DATA
MC68HC58 DLC Parallel Mode Block Diagram ............................................. 1-3
MC68HC58 DLC Serial Mode Block Diagram ................................................ 1-4
MC68HC58 DLC Pin Assignments ................................................................. 2-1
DLC Parallel Mode Circuit .............................................................................. 2-5
DLC Serial Mode Circuit ............................................................................... 2-10
Method 1 — Standby Mode Supplies Applied .............................................. 2-14
Method 2 — Switching VDD with PSEN ....................................................... 2-15
Method 3 — Switching VDD and VCC in Standby Mode ............................. 2-16
J1850 Bus Message Components ................................................................. 3-1
J1850 Bus Frame Format (VPW) ................................................................... 3-1
J1850 VPW Symbols ...................................................................................... 3-5
J1850 VPW Passive Symbols ........................................................................ 3-6
J1850 VPW Active Symbols ........................................................................... 3-8
J1850 VPW Bitwise Arbitration ....................................................................... 3-9
DLC Operating Modes .................................................................................... 4-1
DLC Usage ..................................................................................................... 4-3
DLC Operation ............................................................................................... 4-5
Parallel Mode Byte Format ............................................................................. 4-6
DLC Serial Mode Byte Format ....................................................................... 4-8
SPI Transfer — Clock Polarity Low .............................................................. 4-10
SPI Transfer — Clock Polarity High ............................................................. 4-10
Host/DLC Serial Mode Initialization Routine ................................................ 4-11
Host/DLC Serial Mode Transmit Routine (Part 1 of 2) ................................. 4-14
Host/DLC Serial Mode Transmit Routine (Part 2 of 2) ................................. 4-15
Host/DLC Serial Mode Receive Routine (Part 1 of 2) .................................. 4-18
Host/DLC Serial Mode Receive Routine (Part 2 of 2) .................................. 4-19
Parallel Interface Timing ................................................................................. A-3
SPI Timing — Active High SCLK .................................................................... A-5
SPI Timing — Active Low SCLK .................................................................... A-5
DLC Interrupt Timing ...................................................................................... A-7
Reset Timing .................................................................................................. A-8
Variable Pulse-Width Modulation (VPW) Symbol Timings ............................. A-9
MC68HC58 28-Pin PLCC ............................................................................... B-1
MC68HC58 28-Pin SOIC ............................................................................... B-2
Case Outline #776-02 .................................................................................... B-3
Case Outline #751F-04 .................................................................................. B-4
Title
MOTOROLA
Page
ix