MC68HC58 Motorola, MC68HC58 Datasheet - Page 55

• Manufacturer Part Number: MC68HC58
• Description: Data Link Controller
• Manufacturer: Motorola

4.2.3 Interrupt Requests
MC68HC58
TECHNICAL DATA
Generation of interrupt requests is determined by the values of the configuration byte
IMSK and IMOD bits. By default, the DLC automatically asserts the INT signal when
one or more of four conditions occur. Setting the IMSK bit disables interrupts. Setting
the IMOD bit adds a fifth interrupt request condition.
Figure 4-8 Host/DLC Serial Mode Initialization Routine
DATA REGISTER, INITIATING SPI TRANSFER
FROM THE DLC FROM SPI DATA REGISTER
RETRIEVE THE STATUS BYTE RECEIVED
LOAD CONFIGURATION BYTE INTO SPI
IS SPI TRANSFER COMPLETE?
START DLC SERIAL MODE
DLC RESET NEGATED
ASSERT DLC CS
INIT ROUTINE
DATA LINK CONTROLLER OPERATION
A
YES
NO
FROM THE DLC FROM SPI DATA REGISTER
RETRIEVE THE DATA BYTE RECEIVED
MULTIPLEX BUS COMMUNICATION
BYTE IMMEDIATE” COMMAND BYTE
LOAD “LOAD AS CONFIGURATION
BIT COMBINATION INTO SPI DATA
IS SPI TRANSFER COMPLETE?
DLC IS NOW READY FOR J1850
REGISTER, INITIATING SPI
END DLC SERIAL MODE
NEGATE DLC CS
AND DISCARD
INIT ROUTINE
TRANSFER
A
YES
MOTOROLA
NO
INIT FLOW
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