MC68HC58 Motorola, MC68HC58 Datasheet - Page 39

• Manufacturer Part Number: MC68HC58
• Description: Data Link Controller
• Manufacturer: Motorola

3.1.10 Idle Bus
3.2 J1850 VPW Valid/Invalid Bits and Symbols
MC68HC58
TECHNICAL DATA
An idle condition exists on the J1850 bus after expiration of the IFS period. Any node
sensing an idle bus condition can begin transmission immediately.
The timing tolerances for receiving data bits and symbols from the J1850 bus allow for
variations in the system. The tolerances are balanced by making the maximum of one
symbol length approximately equal to the minimum length of the next longest symbol.
The difference between the symbol boundaries is equal to one clock period of the DLC
internal clock.
ACTIVE
PASSIVE
ACTIVE
PASSIVE
LAST TRANSITION
OF FRAME
ACTIVE
PASSIVE
ACTIVE
PASSIVE
200 S
280 S
200 S
SOF
(C)
EOD
300 S
Figure 3-3 J1850 VPW Symbols
J1850 FRAME FORMAT
EOF
(E)
128 S
128 S
LOGIC “0”
LOGIC “1”
IFS
(A)
(B)
OR
OR
BREAK
200 S
239 S
EOD
(D)
(F)
64 S
64 S
MOTOROLA
J1850 VPW SYMBOLS
3-5