MC68HC58 Motorola, MC68HC58 Datasheet - Page 47

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MC68HC58

Manufacturer Part Number
MC68HC58
Description
Data Link Controller
Manufacturer
Motorola
Datasheet

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4.1.6 Block Mode
4.2 Host Interface
MC68HC58
TECHNICAL DATA
4X mode allows communication on the multiplex bus to be performed at four times the
normal bit rate.
This high speed transfer function does not work properly unless all transmitting nodes
on the J1850 bus are in 4X mode. Selected receivers may be configured to ignore high
speed frames until a BREAK symbol is received. Detection of a BREAK symbol on the
J1850 bus returns the DLC to normal mode.
Refer to 4.6 BREAK Operation for more information.
Block mode is entered when the host fills the transmit first in/first out (TxFIFO) buffer
without indicating the last byte of a message.
During block mode, the terminate auto retry function is automatically enabled. The
DLC continues to transmit message bytes as long as the host loads message bytes
into the TxFIFO buffer without sending the DLC a “load as last byte of transmit data”
command.
The receive first in/first out (RxFIFO) buffer is designed to allow the reception of block
mode messages automatically.
Refer to 4.5 Block Mode Operation for information.
Figure 4-2 shows typical usage of a DLC with an MCU.
MCU
PARALLEL
SPI
OR
DATA LINK CONTROLLER OPERATION
Figure 4-2 DLC Usage
DLC
BUS
LOAD
R
L
C
L
SAE J1850
BUS
DLC USAGE
MOTOROLA
4-3

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