ADMC300-PB Analog Devices, ADMC300-PB Datasheet - Page 25

• Manufacturer Part Number: ADMC300-PB
• Description: High Performance DSP-Based Motor Controller
• Manufacturer: Analog Devices

Encoder Event Timer
The Encoder Event Timer block forms an integral part of the
EIU of the ADMC300. The EET accurately times the duration
between encoder events. The information provided by the EET
may be used to make allowances for the asynchronous timing of
encoder and DSP-reading events. As a result, more accurate
computations of the position and velocity of the motor shaft
may be performed.
The EET consists of a 16-bit encoder event timer, an encoder
pulse decimator and a clock divider as shown in Figure 16. The
EET clock frequency is selected by the 16-bit read/write
EETDIV clock divide register, whose value divides the CLKIN
frequency. The contents of the encoder event timer are incre-
mented on each rising edge of the divided clock signal. An
EETDIV value of zero gives the maximum divide value of
0x10000 (= 65,536), so that the clock frequency to the encoder
event timer is at its minimum possible value.
The quadrature signal from the Encoder Interface Unit is deci-
mated at a rate determined by the 8-bit read/write EETN regis-
ter. For example, writing a value of 2 to EETN, produces a
pulse decimator output train at half the quadrature signal fre-
quency, as shown in Figure 17. The rising edge of this deci-
mated signal is termed a velocity event. Therefore, for an
EETN value of 2, a velocity event occurs every two encoder
edges, or on each edge of one of the encoder signals. An EETN
value of zero gives an effective pulse decimation value of 256.
On the occurrence of a velocity event, the contents of the en-
coder event timer are stored in an intermediate Interval Time
register. Under normal operation, this register stores the
elapsed time between successive velocity events. After, the
timer value has been latched at the velocity event, the contents
of the encoder event timer are reset to one.
Latching Data from the EET
When using the data from the Encoder Event Timer, it is im-
portant to latch a triplet set of data at the same instant in time.
The three pieces of data are the contents of the encoder
quadrature up/down counter, the stored value in the Interval
Time register (giving the precise measured time between the
last two velocity events) and the present value of the encoder
event timer (giving an indication of how much time has passed
since the last velocity event).
The data from the EET can be latched on the occurrence
of either of two different events. The particular event is
ENCODER EVENT
QUADRATURE
TIMER VALUE
VELOCITY
EVENTS
SIGNAL
EIUCNT
EIUCNT
READ
EIA
EIB
EETT
EETDELTAT
selected by Bit 4 (EETLATCH) of the EIUCTRL register.
Setting this EETLATCH bit causes the data to be latched on
the time-out of the encoder loop timer (EIUTIMER). At that
time, the contents of the encoder quadrature counter (EIUCNT)
are latched to a 16-bit, read-only register EETCNT. In addi-
tion, the contents of the intermediate Interval Time register are
latched to the EETT register and the contents of the encoder
event timer are latched to the EETDELTAT register. The
three registers, EETCNT, EETT and EETDELTAT then
contain the desired triplet of position/time data required for
the control algorithm. In addition, if the time-out of the
EIUTIMER is used to generate an interrupt, the required data
is automatically latched and waiting for execution of the inter-
rupt service routine (which may be some time after the time-out
instant if there are multiple interrupts in the system). By latch-
ing the EIUCNT register to the EETCNT, the user does not
have to worry about changes in the EIUCNT register (due
to additional encoder edges) prior to servicing of the EIU
interrupt.
The other EET latch event is chosen by clearing the EETLATCH
bit of the EIUCTRL register. In this mode, whenever the
EIUCNT register is read by the DSP, the current value of the
intermediate Interval Time register is latched to the EETT
register and the current value of the encoder event timer is
latched to the EETDELTAT register. The three registers,
EIUCNT, EETT and EETDELTAT now contain the desired
triplet of position/speed data required for the control algorithm.
Note the difference from before in that the encoder count value
is now available in the EIUCNT register.
It is important to realize that the EETT and EETDELTAT regis-
ters are only updated by either the time-out of the EIUTIMER
register (if EETLATCH bit is set) or the act of reading the
EIUCNT register (if the EETLATCH bit is cleared). Therefore,
if the EETLATCH bit is set, the act of reading the EIUCNT
register will not update the EETT and EETDELTAT registers.
Following a reset, Bit 4 of the EIUCTRL is cleared.
EET Status Register
There is a 1-bit EETSTAT register that indicates whether or
not an overflow of the EET has occurred. If the time between
successive velocity events is sufficiently long, it is possible that
the encoder event timer will overflow. When this condition is
detected, Bit 0 of the EETSTAT register is set and the EETT
register is fixed at 0xFFFF. Reading the EETSTAT register
clears the overflow bit and permits the EETT register to be up-
dated at the next velocity event. If an encoder direction reversal
is detected by the EIU, the encoder event timer is set to zero
and the EETT register is set to its maximum 0xFFFF value.
Subsequent velocity events will cause the EETT register to be
updated with the correct value. If a value of 0xFFFF is read from
the EETT register, Bit 0 of the EETSTAT register can be read
to determine whether an overflow or direction reversal condi-
tion exists. In the case of a direction reversal, the contents of the
EETDELTAT register is valid, representing
the time from the direction reversal to the instant at which the
EIUCNT register is read. On reset the EETN, EETDIV,
EETDELTAT and EETT registers are all cleared to zero.
Whenever either the EETN or EETDIV registers are written to,
the encoder event timer is reset to zero and the EETT register is
set to zero.
ADMC300