C509-L_97 SIEMENS [Siemens Semiconductor Group], C509-L_97 Datasheet - Page 190

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C509-L_97

Manufacturer Part Number
C509-L_97
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
6.6.4
An A/D conversion is internally started by writing into the SFR ADDATL with dummy data. A write
to SFR ADDATL will start a new conversion even if a conversion is currently in progress. The
conversion begins with the next machine cycle, and the BSY flag in SFR ADCON0 will be set.
Basically, the A/D conversion procedure is divided into three parts:
The total A/D conversion time is defined by t
t
parameter as shown in figure 6-49.
Figure 6-49
A/D Conversion Timing
Semiconductor Group
CO
– Sample phase (t
– Conversion phase (t
– Write result phase (t
. The duration of the three phases of an A/D conversion is specified by its specific timing
ADCL1
Conversion Clock
0
0
1
1
A/D Conversion Timing
Prescaler
ADCL0
0
1
0
1
S
), used for sampling the analog input voltage.
ADST1 ADST0
CO
WR
Sample Clock
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
Prescaler
), used for the real A/D conversion.(includes calibration)
), used for writing the conversion result into the ADDAT registers.
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
8 x t
16 x t
32 x t
64 x t
16 x t
32 x t
64 x t
128 x t
32 x t
64 x t
128 x t
256 x t
64 x t
128 x t
256 x t
512 x t
ADCC
Sample
Time
6-112
IN
t
IN
IN
IN
IN
IN
IN
IN
IN
IN
S
IN
IN
IN
IN
IN
IN
which is the sum of the two phase times t
On-Chip Peripheral Components
40 x t
80 x t
160 x t
320 x t
Conversion
Time
t
CO
IN
IN
IN
IN
48 x t
56 x t
72 x t
104 x t
96 x t
112 x t
144 x t
208 x t
192 x t
224 x t
288 x t
416 x t
384 x t
448 x t
576 x t
832 x t
t
ADCC
ConversionTime
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
n
8
9
12
17
16
18
24
34
32
37
48
69
64
74
96
138
CPU Cycles
Tim. Ref
a)
b)
a)
b)
a)
c)
a)
c)
a)
b)
a)
b)
a)
c)
a)
c)
1997-10-01
C509-L
S
and

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