C509-L_97 SIEMENS [Siemens Semiconductor Group], C509-L_97 Datasheet - Page 148

no-image

C509-L_97

Manufacturer Part Number
C509-L_97
Description
8-Bit CMOS Microcontroller
Manufacturer
SIEMENS [Siemens Semiconductor Group]
Datasheet
In a compare timer/CMx register configuration, the compare output is set to a constant high level if
the contents of the compare registers are equal to the reload register (CTREL). The compare output
shows a high level for one timer clock period when a CMx register is set to FFFF H . Thus, the duty
cycle can be varied from 0.xx% to 100% depending on the resolution selected. In figure 6-36 the
maximum and minimum duty cycle of a compare output signal is illustrated. One clock period of the
compare timer is equal to one machine state (= 1 oscillator periods) if the prescaler is off. Thus, at
12 MHz system clock the spike is approx. 83.3 ns long.
Figure 6-36
Modulation Range of a PWM Signal Generated with a Compare Timer/CMx Register
Combination
Semiconductor Group
a)
P4.x
b)
P4.x
CMHx/CMLx
CMHx/CMLx
CTREL
=
/
FFFF
= CTREL (maximum duty cycle)
=
FFFF
H
H
(minimum duty cycle)
One machine state or two oscillator cycle
6-70
On-Chip Peripheral Components
MCT01854
H
L
H
L
1997-10-01
C509-L

Related parts for C509-L_97