bt829bkrf ETC-unknow, bt829bkrf Datasheet - Page 87

• Manufacturer Part Number: bt829bkrf
• Description: Video Streamii Decoders
• Manufacturer: ETC-unknow

Bt829B/827B
VideoStream II Decoders
3.1.3 Digital Signal Interconnect
3.1.4 Analog Signal Interconnect
3.1.5 Latch-up Avoidance
The digital signals of the Bt829B should be isolated as much as possible from the
analog signals and other analog circuitry. Also, the digital signals should not over-
lay the analog power plane.
regular PCB power and ground planes.
To minimize crosstalk, long lengths of closely spaced parallel video signals
should be avoided. Ideally, a ground line should exist between the video signal
traces driving the YIN and CIN inputs.
close to the analog signals.
Latch-up is a failure mechanism inherent to any CMOS device. It is triggered by
static or impulse voltages on any signal input pin when the voltage on the power
pins exceeds 0.5 V, or when it falls below the GND pins by more than 0.5 V.
Latch-up can also occur if the voltage on any power pin exceeds the voltage on
any other power pin by more than 0.5 V.
appear more sensitive to latch-up. Mixed signal devices tend to interact with
peripheral devices, such as video monitors or cameras that are referenced to dif-
ferent ground potentials. Voltages applied to the device prior to the time that its
power system is stable can create conditions that are amenable to the onset of
latch-up.
precautions:
Any termination resistors for the digital signals should be connected to the
To minimize noise coupling, high-speed TTL signals should not be routed
In some cases, devices with mixed signal interfaces, such as the Bt829B, can
To maintain a robust design with the Bt829B, you should take the following
• Apply power to the device before or at the same time that power is applied
• Do not apply voltages below GND–0.5 V or higher than VAA+0.5 V to any
• Connect all VDD, VAA, and VPOS pins together through a low impedance
• Connect all GND, AGND, and VNEG pins together through a low
to the interface circuitry.
pin on the device. Do not use negative supply op-amps or any other nega-
tive voltage interface circuitry. All logic inputs should be held low until
power to the device has settled to the specified tolerance.
plane.
impedance plane.
D829BDSA
3.0 PC Board Layout Considerations
3.1 Ground Planes
77