bt829bkrf ETC-unknow, bt829bkrf Datasheet - Page 73

• Manufacturer Part Number: bt829bkrf
• Description: Video Streamii Decoders
• Manufacturer: ETC-unknow

Bt829B/827B
VideoStream II Decoders
2.3.2 Addressing the Bt829B
2.3.3 Reading and Writing
An I
R/W command. The R/W bit is appended to the base address to form the transmit-
ted I
Figure 2-14. I
Table 2-4. Bt829B Address Matrix
After transmitting a start pulse to initiate a cycle, the master must address the
Bt829B. To do this, the master must transmit one of the four valid Bt829B
addresses, with the Most Significant Bit (MSB) transmitted first. After transmit-
ting the address, the master must release the SDA line during the low phase of the
SCL and wait for an acknowledgment. If the transmitted address matches the
selected Bt829B address, the Bt829B will respond by driving the SDA line low,
generating an acknowledge to the master. The master samples the SDA line at the
rising edge of the SCL line, and proceeds with the cycle. If no device responds,
including the Bt829B, the master transmits a stop pulse and ends the cycle.
mit an 8-bit byte to the Bt829B, with the MSB transmitted first. The Bt829B
acknowledges the transfer and loads the data into its internal address register. The
master then issues a stop command, a start command, or transfers another 8-bit
byte, MSB first. The internal address register points to the 8-bit byte, which is
then loaded into the register. The Bt829B acknowledges the transfer and incre-
ments the address register in preparation for the next transfer. As before, the mas-
ter may issue a stop command, a start command, or transfer another 8 bits which
is loaded into the next register location.
the contents of the register. Its internal address register points to the contents,
MSB first. The master acknowledges receipt of the data and pulls the SDA line
low. As with the write cycle, the address register is auto-incremented in prepara-
tion for the next read.
If the slave address R/W bit was low (indicating a write) the master will trans-
If the slave address R/W bit was high (indicating a read), the Bt829B transfers
2
2
C address, as shown in Figure 2-14 and Table 2-4.
C slave address consists of two parts: a 7-bit base address and a single bit
I2CCS Pin
0
1
2
C Slave Address Configuration
A6
A5
D829BDSA
Bt829B Base
Base Address
A4
1000100
1000100
1000101
1000101
A3
A2
A1
A0 R/W
R/W Bit
0
1
0
1
R/W Bit
2.0 Electrical Interfaces
2.3 I
Action
Write
Write
Read
Read
2
C Interface
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