bt829bkrf ETC-unknow, bt829bkrf Datasheet - Page 77

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bt829bkrf

Manufacturer Part Number
bt829bkrf
Description
Video Streamii Decoders
Manufacturer
ETC-unknow
Datasheet

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Bt829B/827B
VideoStream II Decoders
2.4.1 Need for Functional Verification
2.4.2 JTAG Approach to Testability
2.4 JTAG Interface
As the complexity of imaging chips increases, the need to easily access individual
chips for functional verification is vital. The Bt829B incorporates special circuitry
which makes it accessible in full compliance with Joint Test Action Group
(JTAG) standards. Conforming to IEEE P1149.1 “Standard Test Access Port and
Boundary Scan Architecture,” the Bt829B contains dedicated pins used only for
testability purposes.
JTAG’s approach to testability uses boundary scan cells that are placed at each
digital pin and digital interface. (A digital interface is defined as the boundary
between an analog block and a digital block within the Bt829B). All cells are
interconnected into a boundary scan register that applies or captures test data to
verify functionality of the integrated circuit. JTAG is particularly useful for board
testers using functional testing methods.
These pins are Test Mode Select (TMS), Test Clock (TCK), Test Data Input
(TDI), Test Data Out (TDO), and Test Reset (TRST). The TRST pin resets the
JTAG controller when pulled low at any time. Verification of the integrated circuit
and its connection to other modules on the printed circuit board is achieved
through these five TAP pins. With boundary scan cells at each digital interface
and pin, the Bt829B is capable of applying and capturing the respective logic lev-
els. Because all of the digital pins are interconnected as a long shift register, the
TAP logic has access to the necessary pins. This ensures verification of pin func-
tionality. The TAP controller can shift in any number of test vectors through the
TDI input and can apply them to the internal circuitry. The output result is
scanned on the TDO pin and is externally checked. While isolating the Bt829B
from other components on the board, the user has easy access to all Bt829B digi-
tal pins and digital interfaces through the TAP. The user can then perform com-
plete functionality tests without using expensive bed-of-nails testers.
JTAG consists of five dedicated pins comprising the Test Access Port (TAP).
D829BDSA
2.0 Electrical Interfaces
2.4 JTAG Interface
67

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