bt829bkrf ETC-unknow, bt829bkrf Datasheet - Page 45

• Manufacturer Part Number: bt829bkrf
• Description: Video Streamii Decoders
• Manufacturer: ETC-unknow

Bt829B/827B
VideoStream II Decoders
enable capture of the VBI region ancillary data for later processing by software.
In this mode the VBI region of the video signal is processed as follows:
Figure 1-18. Bt829B VBI Data Path
Composite
Composite
The Bt829B can be configured in a mode known as VBI data pass through to
• The analog composite video signal is digitized at 8*Fsc (28.63636 MHz
• The 8-bit data stream bypasses the decimation filter, Y/C separation filters,
• The Bt829B provides the option to pack the 8*Fsc data stream into a 2-
• The VBI datastream is not pipeline-delayed to match the YCrCb 4:2:2
• A larger number of pixels per line are generated in VBI output mode than
• The following pins may be used to implement this solution: VD[15:0],
• Because the 8*Fsc data stream does not pass through the interpolation fil-
Analog
Analog
for NTSC and 35.46895 MHz for PAL/SECAM). This 8-bit value repre-
sents a number range from the bottom of sync tip to the peak of the com-
posite video signal.
and the interpolation filter (see Figure 1-18).
byte-wide stream at 4*Fsc before outputting it to the VD[15:0] data pins,
or it can simply be output as an 8-bit 8*Fsc data stream on pins VD[15:8].
In the packed format, the first byte of each pair on a 4*Fsc clock cycle is
mapped to VD[15:8] and the second byte to VD[7:0] with VD[7] and
VD[15] being the MSBs. The Bt829B uses the same 16-pin data port for
VBI data and YCrCb 4:2:2 image data. The byte pair ordering is
programmable.
image output data with respect to horizontal timing (i.e., valid VBI data
will be output earlier than YCrCb 4:2:2 relative to the Bt829B HRESET
signal).
in YCrCb 4:2:2 output mode. The downstream video processor must be
capable of dealing with a varying number of pixels per line in order to cap-
ture VBI data, as well as YCrCb 4:2:2 data from the same frame.
VACTIVE, HACTIVE, DVALID, VRESET, HRESET, CLKx1, CLKx2,
and QCLK. This should allow the downstream video processor to load the
VBI data and the YCrCb 4:2:2 data correctly.
ter, the sample stream is not locked/synchronized to the horizontal sync
timing. The only implication of this is that the sample locations on each
line are not correlated vertically.
ADC
ADC
D829BDSA
Decimation
Decimation
8xFsc
Filter
Filter
8
Separation
Separation
8xFsc
Filter
Filter
Pack
Y/C
Y/C
8
1.9 Bt829B VBI Data Output Interface
1.0 Functional Description
4xFsc
Interpolation
Interpolation
Filter
Filter
16
Data
Data
VBI
VBI
35