mfr4300 Freescale Semiconductor, Inc, mfr4300 Datasheet - Page 63

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mfr4300

Manufacturer Part Number
mfr4300
Description
Flexray Communication Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
3.2.1.5
The TXD_BG2 signal carries the transmit data for channel B to the corresponding FlexRay bus driver
3.2.1.6
The TXEN2# signal indicates to the FlexRay bus driver that the FlexRay module is attempting to transmit
data on channel B.
3.2.1.7
These signals provide the selected debug strobe signals. For details on the debug strobe signal selection
refer to
3.3
The FlexRay module occupies 1280 bytes of address space starting at address 0x0000.
3.3.1
The complete memory map of the FlexRay module is shown in
Freescale Semiconductor
Address
0x000A
0x000C
0x000E
0x001A
0x001C
0x001E
0x0000
0x0002
0x0004
0x0006
0x0008
0x0010
0x0012
0x0014
0x0016
0x0018
0x0020
0x0022
Section 3.4.16, “Strobe Signal
Memory Map and Register Description
Memory Map
TXD_BG2 — Transmit Data Channel B
TXEN2# — Transmit Enable Channel B
DBG3, DBG2, DBG1, DBG0 — Strobe Signals
Message Buffer Segment Size and Utilization Register (MBSSUTR)
Table 3-3. FlexRay Memory Map (Sheet 1 of 4)
Message Buffer Interrupt Vector Register (MBIVEC)
Global Interrupt Flag and Enable Register (GIFER)
Message Buffer Data Size Register (MBDSR)
Protocol Interrupt Enable Register 0 (PIER0)
Protocol Interrupt Enable Register 1 (PIER1)
Protocol Operation Control Register (POCR)
Strobe Signal Control Register (STBSCR)
Protocol Interrupt Flag Register 0 (PIFR0)
Protocol Interrupt Flag Register 1 (PIFR1)
Strobe Port Control Register (STBPCR)
Module Configuration and Control
Module Configuration Register (MCR)
Support”.
CHI Error Flag Register (CHIERFR)
Interrupt and Error Handling
MFR4300 Data Sheet, Rev. 3
Module Version Register (MVR)
Test Registers
Reserved
Reserved
Reserved
Reserved
Register
Table
3-3.
FlexRay Module (FLEXRAYV2)
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
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